[Intel-gfx] [PATCH] drm/i915: Implement a better i945gm vblank irq vs. C-states workaround

[Chris Wilson]

Quoting Ville Syrjala (2019-10-03 15:02:31)
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> The current "disable C3+" workaround for the delayed vblank
> irqs on i945gm no longer works. I'm not sure what changed, but
> now I need to also disable C2. I also got my hands on a i915gm
> machine that suffers from the same issue.
> 
> After some furious poking of registers I managed to find a
> better workaround: The "Do not Turn off Core Render Clock in C
> states" bit. With that I no longer have to disable any C-states,
> and as a nice bonus the power cost is only ~1/4 of the
> "disable C3+" method (which mind you doesn't even work anymore,
> and so would have an even higher power cost if we made it work
> by also disabling C2).
> 
> So let's throw out all the cpuidle/qos crap and just toggle
> the magic bit as needed. And we extend the workaround to cover
> i915gm as well.

Nice discovery. ScratchPad0 suggests that it may have been a late
addition, there might be some chips out there that don't have the magic
bit. Working on most is better than broken on all.

> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Empirical results rule, and I for one am much happier without needing
qos dma_latency,
Acked-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris