[Intel-gfx] [PATCH v3 18/21] drm/i915: Don't try to place HWS in non-existing mappable region

[Chris Wilson]

Quoting Matthew Auld (2019-10-04 18:04:49)
> From: Michal Wajdeczko <michal.wajdeczko at intel.com>
> 
> HWS placement restrictions can't just rely on HAS_LLC flag.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Signed-off-by: Matthew Auld <matthew.auld at intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 80fd072ac719..f6799ef9915a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -513,7 +513,8 @@ static int pin_ggtt_status_page(struct intel_engine_cs *engine,
>         unsigned int flags;
>  
>         flags = PIN_GLOBAL;
> -       if (!HAS_LLC(engine->i915))
> +       if (!HAS_LLC(engine->i915) &&
> +           i915_ggtt_has_aperture(&engine->i915->ggtt))

engine->gt->ggtt is the preferred abstracted route.
-Chris