[Intel-gfx] [RFC v3 5/9] drm/i915: Extract framebufer CCS offset checks into a function

[Matt Roper]

On Mon, Sep 23, 2019 at 03:29:31AM -0700, Dhinakaran Pandiyan wrote:
> intel_fill_fb_info() has grown quite large and wrapping the offset checks
> into a separate function makes the loop a bit easier to follow.
> 
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>

I agree with Ville's comments, but otherwise,

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>


> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 69 ++++++++++++--------
>  1 file changed, 40 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 6fec43cdddf4..7447001c1f85 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2682,6 +2682,43 @@ static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
>  	return stride > max_stride;
>  }
>  
> +static int
> +intel_fb_check_ccs_xy(struct drm_framebuffer *fb, int x, int y)
> +{
> +	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> +	int hsub = fb->format->hsub;
> +	int vsub = fb->format->vsub;
> +	int tile_width, tile_height;
> +	int ccs_x, ccs_y;
> +	int main_x, main_y;
> +
> +	intel_tile_dims(fb, 1, &tile_width, &tile_height);
> +
> +	tile_width *= hsub;
> +	tile_height *= vsub;
> +
> +	ccs_x = (x * hsub) % tile_width;
> +	ccs_y = (y * vsub) % tile_height;
> +	main_x = intel_fb->normal[0].x % tile_width;
> +	main_y = intel_fb->normal[0].y % tile_height;
> +
> +	/*
> +	* CCS doesn't have its own x/y offset register, so the intra CCS tile
> +	* x/y offsets must match between CCS and the main surface.
> +	*/
> +	if (main_x != ccs_x || main_y != ccs_y) {
> +		DRM_DEBUG_KMS("Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
> +			      main_x, main_y,
> +			      ccs_x, ccs_y,
> +			      intel_fb->normal[0].x,
> +			      intel_fb->normal[0].y,
> +			      x, y);
> +		return -EINVAL;
> +	}
> +
> +	return 0;
> +}
> +
>  static int
>  intel_fill_fb_info(struct drm_i915_private *dev_priv,
>  		   struct drm_framebuffer *fb)
> @@ -2713,35 +2750,9 @@ intel_fill_fb_info(struct drm_i915_private *dev_priv,
>  		}
>  
>  		if (is_ccs_modifier(fb->modifier) && i == 1) {
> -			int hsub = fb->format->hsub;
> -			int vsub = fb->format->vsub;
> -			int tile_width, tile_height;
> -			int main_x, main_y;
> -			int ccs_x, ccs_y;
> -
> -			intel_tile_dims(fb, i, &tile_width, &tile_height);
> -
> -			tile_width *= hsub;
> -			tile_height *= vsub;
> -
> -			ccs_x = (x * hsub) % tile_width;
> -			ccs_y = (y * vsub) % tile_height;
> -			main_x = intel_fb->normal[0].x % tile_width;
> -			main_y = intel_fb->normal[0].y % tile_height;
> -
> -			/*
> -			 * CCS doesn't have its own x/y offset register, so the intra CCS tile
> -			 * x/y offsets must match between CCS and the main surface.
> -			 */
> -			if (main_x != ccs_x || main_y != ccs_y) {
> -				DRM_DEBUG_KMS("Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
> -					      main_x, main_y,
> -					      ccs_x, ccs_y,
> -					      intel_fb->normal[0].x,
> -					      intel_fb->normal[0].y,
> -					      x, y);
> -				return -EINVAL;
> -			}
> +			ret = intel_fb_check_ccs_xy(fb, x, y);
> +			if (ret)
> +				return ret;
>  		}
>  
>  		/*
> -- 
> 2.17.1
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795