[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Enable second dbuf slice for ICL
Patchwork
patchwork at emeril.freedesktop.org
Wed Oct 9 10:03:19 UTC 2019
== Series Details ==
Series: drm/i915: Enable second dbuf slice for ICL
URL : https://patchwork.freedesktop.org/series/67771/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8c8c36e0a241 drm/i915: Enable second dbuf slice for ICL
-:52: CHECK:CAMELCASE: Avoid CamelCase: <GBps>
#52: FILE: drivers/gpu/drm/i915/intel_pm.c:3824:
+ if ((num_active > 1 || total_data_bw >= GBps(12))) {
-:186: WARNING:LONG_LINE_COMMENT: line over 100 characters
#186: FILE: drivers/gpu/drm/i915/intel_pm.c:3980:
+ * According to BSpec pipe can share one dbuf slice with another pipes or pipe can use
-:253: CHECK:LINE_SPACING: Please don't use multiple blank lines
#253: FILE: drivers/gpu/drm/i915/intel_pm.c:4390:
+
+
-:288: WARNING:LINE_SPACING: Missing a blank line after declarations
#288: FILE: drivers/gpu/drm/i915/intel_pm.c:4425:
+ int i;
+ for (i = 0; i < ARRAY_SIZE(icl_allowed_dbufs); i++) {
-:303: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#303: FILE: drivers/gpu/drm/i915/intel_pm.c:4440:
+u32 i915_get_allowed_dbuf_mask(struct drm_i915_private *dev_priv,
+ int pipe, u32 active_pipes,
total: 0 errors, 2 warnings, 3 checks, 285 lines checked
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