[Intel-gfx] [PATCH 07/11] drm/i915/tgl: Wa_1409170338

Chris Wilson chris at chris-wilson.co.uk
Tue Oct 15 16:03:13 UTC 2019


Quoting Mika Kuoppala (2019-10-15 16:44:45)
> Avoid possible hang in tsg,vfe units by keeping
> l3 clocks runnings.
> 
> Signed-off-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index b7d7fdc5ba90..4b7740aaf3bf 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -902,6 +902,12 @@ tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>                 wa_write_or(wal,
>                             SUBSLICE_UNIT_LEVEL_CLKGATE2,
>                             CPSSUNIT_CLKGATE_DIS);
> +
> +       /* Wa_1409180338:tgl */
> +       if (IS_TGL_REVID(i915, TGL_REVID_A0, TGL_REVID_A0))
> +               wa_write_or(wal,
> +                           SLICE_UNIT_LEVEL_CLKGATE,
> +                           L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS);
>  }

I've seen this somewhere before... ;)
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris


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