[Intel-gfx] [RFC PATCH v2 3/3] tests/gem_exec_reloc: Detect minimum batch size

[Janusz Krzysztofik]

The basic-range subtest have been already taught to calculate softpin
offsets from minimum batch size, however it still uses a hardcoded
value of 4kB.  On future backends with possibly bigger minimum batch
sizes this subtest will fail as buffer objects may overlap.

Detect minimum batch size instead of using a hardcoded value.  To avoid
conflicts with addresses occupied by other users, do that only when
running on full PPGTT.  Platforms without full PPGTT are not expected
to support backends with minimum batch sizes greater than 4kB.

Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik at linux.intel.com>
---
 tests/i915/gem_exec_reloc.c | 41 +++++++++++++++++++++++++++++++++++--
 1 file changed, 39 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index 61401ea7..b71fe0be 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -511,6 +511,42 @@ static uint64_t gen8_canonical_address(uint64_t address)
 	return sign_extend(address, 47);
 }
 
+static int local_gem_minimum_batch_order(int fd)
+{
+	struct drm_i915_gem_exec_object2 obj;
+	struct drm_i915_gem_execbuffer2 execbuf;
+	uint64_t gtt_size = gem_aperture_size(fd);
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	int batch_order = 12;
+	uint64_t batch_size = 1ull << batch_order; /* 4096 */
+
+	if (!gem_uses_full_ppgtt(fd) || !gem_has_softpin(fd))
+		return batch_order;
+
+	memset(&obj, 0, sizeof(obj));
+	memset(&execbuf, 0, sizeof(execbuf));
+
+	obj.handle = gem_create(fd, 4096);
+	obj.flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+	while (batch_size < gtt_size) {
+		obj.offset = gtt_size - batch_size;
+		obj.offset = gen8_canonical_address(obj.offset);
+		gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+		execbuf.buffers_ptr = to_user_pointer(&obj);
+		execbuf.buffer_count = 1;
+		if (!__gem_execbuf(fd, &execbuf)) {
+			igt_debug("batch_order=%d, batch_size=%llx\n",
+				  batch_order, (long long)batch_size);
+			break;
+		}
+		batch_size <<= 1;
+		batch_order++;
+	}
+	gem_close(fd, obj.handle);
+	igt_require(batch_size < gtt_size);
+	return batch_order;
+}
+
 static void basic_range(int fd, unsigned flags)
 {
 	struct drm_i915_gem_relocation_entry reloc[128];
@@ -520,8 +556,8 @@ static void basic_range(int fd, unsigned flags)
 	uint64_t gtt_size = gem_aperture_size(fd);
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	igt_spin_t *spin = NULL;
-	int batch_order = 12;
-	uint64_t batch_size = 1ull << batch_order; /* 4096 */
+	int batch_order = local_gem_minimum_batch_order(fd);
+	uint64_t batch_size = 1ull << batch_order;
 	int count, n;
 
 	igt_require(gem_has_softpin(fd));
@@ -530,6 +566,7 @@ static void basic_range(int fd, unsigned flags)
 		;
 
 	count -= batch_order;
+	igt_require(count);
 
 	memset(obj, 0, sizeof(obj));
 	memset(reloc, 0, sizeof(reloc));
-- 
2.21.0