[Intel-gfx] [PATCH] drm/i915: capture aux page table error register

Lionel Landwerlin lionel.g.landwerlin at intel.com
Fri Oct 25 12:29:46 UTC 2019


On 25/10/2019 15:22, Chris Wilson wrote:
> Quoting Lionel Landwerlin (2019-10-25 13:17:18)
>> TGL introduced a feature in which we map the main surface to the
>> auxilliary surface. If we screw up the page tables, the HW has a
>> register to tell us which engine encounters a fault in the page table
>> walk.
> Platform specific, or for likely all gen12 and then gen12+?


It also applies to the new DGFX patches that started trickling down.

Though I don't know where the Gen12 boundary is which is why I went with 
platform name.


In Mesa we went for a flag on the device_info struct so it's easy to 
toggle on/off for a particular product.


>   
>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
> Acked-by: Chris Wilson <chris at chris-wilson.co.uk>
>
> I'm reminded of my desire to just grab a snapshot of all nearby mmio and
> zip it up.


Yep... And jsonify it or something? ;)


> -Chris
>



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