[Intel-gfx] [PATCH 5/5] drm/i915/tgl: Add AUX B & C to DC_OFF_POWER_DOMAINS

Lucas De Marchi lucas.demarchi at intel.com
Fri Oct 25 23:24:44 UTC 2019


On Fri, Oct 25, 2019 at 04:06:23PM -0700, Matt Roper wrote:
>Our TGL CI platforms are running into cases where aux transactions have
>failed to complete or declare a timeout well after the timeout limit
>that the hardware is supposed to enforce.  From the logs it appears that

it's a good idea to copy the relevant part of the log here so the commit
message is self-sufficient

>these failures arise when aux transactions happen after we've entered
>DC6.  On TGL AUX B & C are in PG1 (managed by the DMC firmware) rather
>than PG3 as they were on ICL.
>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
>---
> drivers/gpu/drm/i915/display/intel_display_power.c | 2 ++
> 1 file changed, 2 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
>index 6f9e7927e248..707ac110e271 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_power.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
>@@ -2682,6 +2682,8 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> 	TGL_PW_2_POWER_DOMAINS |			\
> 	BIT_ULL(POWER_DOMAIN_MODESET) |			\
> 	BIT_ULL(POWER_DOMAIN_AUX_A) |			\
>+	BIT_ULL(POWER_DOMAIN_AUX_B) |			\
>+	BIT_ULL(POWER_DOMAIN_AUX_C) |			\
> 	BIT_ULL(POWER_DOMAIN_INIT))
>
> #define TGL_DDI_IO_D_TC1_POWER_DOMAINS (	\
>-- 
>2.21.0
>
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