[Intel-gfx] [PATCH] drm/dp: Increase link status size

[Jani Nikula]

On Tue, 29 Oct 2019, Thierry Reding <thierry.reding at gmail.com> wrote:
> From: Thierry Reding <treding at nvidia.com>
>
> The current link status contains bytes 0x202 through 0x207, but we also
> want to make sure to include the DP_ADJUST_REQUEST_POST_CURSOR2 (0x20c)
> so that the post-cursor adjustment can be queried during link training.

We don't currently use this in i915 (we probably should), so the impact
here is that we'll just read more DPCD than before. I quickly perused
i915, and this does not appear to directly break anything. I think the
change is probably fine, but at the same time it freaks me out a bit...

If you don't mind, please resend this with Cc:
intel-gfx at lists.freedesktop.org to have our CI crunch through it across
a number of platforms. Would give me a warm fuzzy feeling. :)

With the caveat that I didn't look at any other drivers besides i915,

Reviewed-by: Jani Nikula <jani.nikula at intel.com>


>
> Reported-by: coverity-bot <keescook+coverity-bot at chromium.org>
> Addresses-Coverity-ID: 1487366 ("Memory - corruptions")
> Fixes: 79465e0ffeb9 ("drm/dp: Add helper to get post-cursor adjustments")
> Signed-off-by: Thierry Reding <treding at nvidia.com>
> ---
> I vaguely recall once carrying a patch to do this, but I can't find any
> trace of it.
>
>  include/drm/drm_dp_helper.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 51ecb5112ef8..9581dec900ba 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -1121,7 +1121,7 @@
>  #define DP_MST_PHYSICAL_PORT_0 0
>  #define DP_MST_LOGICAL_PORT_0 8
>  
> -#define DP_LINK_STATUS_SIZE	   6
> +#define DP_LINK_STATUS_SIZE	   11
>  bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
>  			  int lane_count);
>  bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],

-- 
Jani Nikula, Intel Open Source Graphics Center