[Intel-gfx] [PATCH RESEND 2/7] drm/dsc: add helper for calculating rc buffer size from DPCD

Kulkarni, Vandita vandita.kulkarni at intel.com
Wed Apr 8 09:50:25 UTC 2020


> -----Original Message-----
> From: Jani Nikula <jani.nikula at intel.com>
> Sent: Friday, March 27, 2020 6:12 PM
> To: intel-gfx at lists.freedesktop.org; dri-devel at lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula at intel.com>; Alex Deucher
> <alexdeucher at gmail.com>; Harry Wentland <hwentlan at amd.com>; Navare,
> Manasi D <manasi.d.navare at intel.com>; Kulkarni, Vandita
> <vandita.kulkarni at intel.com>
> Subject: [PATCH RESEND 2/7] drm/dsc: add helper for calculating rc buffer size
> from DPCD
> 
> Add a helper for calculating the rc buffer size from the DCPD offsets
> DP_DSC_RC_BUF_BLK_SIZE and DP_DSC_RC_BUF_SIZE.
> 
> Cc: Alex Deucher <alexdeucher at gmail.com>
> Cc: Harry Wentland <hwentlan at amd.com>
> Cc: Manasi Navare <manasi.d.navare at intel.com>
> Cc: Vandita Kulkarni <vandita.kulkarni at intel.com>
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>

Looks good to me.
Reviewed-by: Vandita Kulkarni <vandita.kulkarni at intel.com>
> ---
>  drivers/gpu/drm/drm_dsc.c | 27 +++++++++++++++++++++++++++
>  include/drm/drm_dsc.h     |  1 +
>  2 files changed, 28 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_dsc.c b/drivers/gpu/drm/drm_dsc.c index
> 09afbc01ea94..ff602f7ec65b 100644
> --- a/drivers/gpu/drm/drm_dsc.c
> +++ b/drivers/gpu/drm/drm_dsc.c
> @@ -49,6 +49,33 @@ void drm_dsc_dp_pps_header_init(struct dp_sdp_header
> *pps_header)  }  EXPORT_SYMBOL(drm_dsc_dp_pps_header_init);
> 
> +/**
> + * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes
> + * @rc_buffer_block_size: block size code, according to DPCD offset 62h
> + * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h
> + *
> + * return:
> + * buffer size in bytes, or 0 on invalid input  */ int
> +drm_dsc_dp_rc_buffer_size(u8 rc_buffer_block_size, u8 rc_buffer_size) {
> +	int size = 1024 * (rc_buffer_size + 1);
> +
> +	switch (rc_buffer_block_size) {
> +	case DP_DSC_RC_BUF_BLK_SIZE_1:
> +		return 1 * size;
> +	case DP_DSC_RC_BUF_BLK_SIZE_4:
> +		return 4 * size;
> +	case DP_DSC_RC_BUF_BLK_SIZE_16:
> +		return 16 * size;
> +	case DP_DSC_RC_BUF_BLK_SIZE_64:
> +		return 64 * size;
> +	default:
> +		return 0;
> +	}
> +}
> +EXPORT_SYMBOL(drm_dsc_dp_rc_buffer_size);
> +
>  /**
>   * drm_dsc_pps_payload_pack() - Populates the DSC PPS
>   *
> diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index
> 887954cbfc60..537a68330840 100644
> --- a/include/drm/drm_dsc.h
> +++ b/include/drm/drm_dsc.h
> @@ -602,6 +602,7 @@ struct drm_dsc_pps_infoframe {  } __packed;
> 
>  void drm_dsc_dp_pps_header_init(struct dp_sdp_header *pps_header);
> +int drm_dsc_dp_rc_buffer_size(u8 rc_buffer_block_size, u8
> +rc_buffer_size);
>  void drm_dsc_pps_payload_pack(struct drm_dsc_picture_parameter_set
> *pps_sdp,
>  				const struct drm_dsc_config *dsc_cfg);  int
> drm_dsc_compute_rc_parameters(struct drm_dsc_config *vdsc_cfg);
> --
> 2.20.1



More information about the Intel-gfx mailing list