[Intel-gfx] [PATCH 0/3] Tigerlake workaround updates

[Matt Roper]

A recent bspec update updated Wa_1409767108 and added Wa_14010477008 to
the TGL list.  Also, register 0xFDC details are missing from the gen12
section of the bspec, but we have offline confirmation from the hardware
folks that this register does indeed still exist and behave as it did on
gen11, so we should still use it to steer multicast registers when
applying workarounds.

Matt Roper (3):
  drm/i915/tgl: Extend Wa_1409767108:tgl to B0 stepping
  drm/i915/tgl: Add Wa_14010477008:tgl
  drm/i915/tgl: Initialize multicast register steering for workarounds

 .../gpu/drm/i915/display/intel_display_power.c  |  2 +-
 drivers/gpu/drm/i915/display/intel_sprite.c     | 17 ++++++++++++-----
 drivers/gpu/drm/i915/gt/intel_workarounds.c     |  2 ++
 drivers/gpu/drm/i915/i915_drv.h                 |  2 ++
 4 files changed, 17 insertions(+), 6 deletions(-)

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2.24.1