[Intel-gfx] [PATCH 2/3] drm/i915/tgl: Add Wa_14010477008:tgl

[Souza, Jose]

On Tue, 2020-04-14 at 14:11 -0700, Matt Roper wrote:
> Media decompression support should not be advertised on any display
> planes for steppings A0-C0.

Reviewed-by: José Roberto de Souza <jose.souza at intel.com>

> 
> Bspec: 53273
> Fixes: 2dfbf9d2873a ("drm/i915/tgl: Gen-12 display can decompress
> surfaces compressed by the media engine")
> Cc: Matt Atwood <matthew.s.atwood at intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_sprite.c | 17 ++++++++++++-----
>  drivers/gpu/drm/i915/i915_drv.h             |  2 ++
>  2 files changed, 14 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
> b/drivers/gpu/drm/i915/display/intel_sprite.c
> index deda351719db..33d886141138 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -2817,19 +2817,25 @@ static bool
> skl_plane_format_mod_supported(struct drm_plane *_plane,
>  	}
>  }
>  
> -static bool gen12_plane_supports_mc_ccs(enum plane_id plane_id)
> +static bool gen12_plane_supports_mc_ccs(struct drm_i915_private
> *dev_priv,
> +					enum plane_id plane_id)
>  {
> +	/* Wa_14010477008:tgl[a0..c0] */
> +	if (IS_TGL_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_C0))
> +		return false;
> +
>  	return plane_id < PLANE_SPRITE4;
>  }
>  
>  static bool gen12_plane_format_mod_supported(struct drm_plane
> *_plane,
>  					     u32 format, u64 modifier)
>  {
> +	struct drm_i915_private *dev_priv = to_i915(_plane->dev);
>  	struct intel_plane *plane = to_intel_plane(_plane);
>  
>  	switch (modifier) {
>  	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
> -		if (!gen12_plane_supports_mc_ccs(plane->id))
> +		if (!gen12_plane_supports_mc_ccs(dev_priv, plane->id))
>  			return false;
>  		/* fall through */
>  	case DRM_FORMAT_MOD_LINEAR:
> @@ -2998,9 +3004,10 @@ static const u32 *icl_get_plane_formats(struct
> drm_i915_private *dev_priv,
>  	}
>  }
>  
> -static const u64 *gen12_get_plane_modifiers(enum plane_id plane_id)
> +static const u64 *gen12_get_plane_modifiers(struct drm_i915_private
> *dev_priv,
> +					    enum plane_id plane_id)
>  {
> -	if (gen12_plane_supports_mc_ccs(plane_id))
> +	if (gen12_plane_supports_mc_ccs(dev_priv, plane_id))
>  		return gen12_plane_format_modifiers_mc_ccs;
>  	else
>  		return gen12_plane_format_modifiers_rc_ccs;
> @@ -3070,7 +3077,7 @@ skl_universal_plane_create(struct
> drm_i915_private *dev_priv,
>  
>  	plane->has_ccs = skl_plane_has_ccs(dev_priv, pipe, plane_id);
>  	if (INTEL_GEN(dev_priv) >= 12) {
> -		modifiers = gen12_get_plane_modifiers(plane_id);
> +		modifiers = gen12_get_plane_modifiers(dev_priv,
> plane_id);
>  		plane_funcs = &gen12_plane_funcs;
>  	} else {
>  		if (plane->has_ccs)
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index e9ee4daa9320..e256b6be5d79 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1508,6 +1508,8 @@ IS_SUBPLATFORM(const struct drm_i915_private
> *i915,
>  	(IS_ICELAKE(p) && IS_REVID(p, since, until))
>  
>  #define TGL_REVID_A0		0x0
> +#define TGL_REVID_B0		0x1
> +#define TGL_REVID_C0		0x2
>  
>  #define IS_TGL_REVID(p, since, until) \
>  	(IS_TIGERLAKE(p) && IS_REVID(p, since, until))