[Intel-gfx] [PATCH] drm/i915: Add ICL PG3 PW ID for EHL

[Manna, Animesh]

On 17-04-2020 22:58, Anshuman Gupta wrote:
> Gen11 onwards PG3 contains functions for pipe B,
> external displays, and VGA. Add missing ICL_DISP_PW_3
> for ehl_power_wells.
>
> Cc: Animesh Manna <animesh.manna at intel.com>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1737
> Signed-off-by: Anshuman Gupta <anshuman.gupta at intel.com>

Looks ok to me.
Reviewed-by: Animesh Manna <animesh.manna at intel.com>

> ---
>   drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 1d01c79fb9db..e9ced41fe7e3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -3804,7 +3804,7 @@ static const struct i915_power_well_desc ehl_power_wells[] = {
>   		.name = "power well 3",
>   		.domains = ICL_PW_3_POWER_DOMAINS,
>   		.ops = &hsw_power_well_ops,
> -		.id = DISP_PW_ID_NONE,
> +		.id = ICL_DISP_PW_3,
>   		{
>   			.hsw.regs = &hsw_power_well_regs,
>   			.hsw.idx = ICL_PW_CTL_IDX_PW_3,