[Intel-gfx] [CI] drm/i915/gt: Apply the magic PM interval roundup to all!

[Chris Wilson]

We have a note that a PM interval value (e.g. for RPS EI) that is not a
multiple of 25 causes missed interrupts on some Sandybridge machines. We
are observing missed interrupts (which I speculate is due to some sort
of internal rounding in the PCU) on more recent machines as well, so
let's experiment with applying the empirical rounding of yore.

v2: Doesn't seem to impact gen9, but expanding to cover gen7 (as that
has the same clock frequency as gen6) seems to be an improvement.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/1791
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c b/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
index 852a7d731b3b..59130f559c4b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
@@ -87,6 +87,8 @@ u32 intel_gt_ns_to_pm_interval(const struct intel_gt *gt, u32 ns)
 {
 	u32 val;
 
+	val = DIV_ROUND_UP(intel_gt_ns_to_clock_interval(gt, ns), 16);
+
 	/*
 	 * Make these a multiple of magic 25 to avoid SNB (eg. Dell XPS
 	 * 8300) freezing up around GPU hangs. Looks as if even
@@ -94,8 +96,7 @@ u32 intel_gt_ns_to_pm_interval(const struct intel_gt *gt, u32 ns)
 	 * EI/thresholds are "bad", leading to a very sluggish or even
 	 * frozen machine.
 	 */
-	val = DIV_ROUND_UP(intel_gt_ns_to_clock_interval(gt, ns), 16);
-	if (IS_GEN(gt->i915, 6))
+	if (gt->clock_frequency == MHZ_25)
 		val = roundup(val, 25);
 
 	return val;
-- 
2.20.1