[Intel-gfx] [patch] drm/i915: Update Slylake PCI IDs

[Jani Nikula]

On Wed, 29 Apr 2020, Ville Syrjälä <ville.syrjala at linux.intel.com> wrote:
> On Tue, Apr 28, 2020 at 11:27:50PM -0400, Alexei Podtelezhnikov wrote:
>> Add three new devices 0x1513, 0x1515, and 0x1517 also known as 
>
> typo 0x15 vs. 0x19
>
>> iSKLULTGT15, iSKLULXGT15, and iSKLDTGT15. Reclassify 0x1923, 0x1927, 
>> and 0x192A according to specifications.
>
> I'd make this three separate patches, just in case we have to revert
> some of these in the future. Most worried about the 0x192a case since
> the evidence is rather poor.

+1

>
> Otherwise lgtm.
>
>> 
>> Signed-off-by: Alexei Podtelezhnikov <apodtele at gmail.com> 
>> ---
>>  include/drm/i915_pciids.h | 19 +++++++++++--------
>>  1 file changed, 11 insertions(+), 8 deletions(-)
>> 
>> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
>> index 1d2c1221..c12bce9e 100644
>> --- a/include/drm/i915_pciids.h
>> +++ b/include/drm/i915_pciids.h
>> @@ -331,15 +331,18 @@
>>  	INTEL_VGA_DEVICE(0x22b3, info)
>>  
>>  #define INTEL_SKL_ULT_GT1_IDS(info) \
>> -	INTEL_VGA_DEVICE(0x1906, info) /* ULT GT1 */
>> +	INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
>> +	INTEL_VGA_DEVICE(0x1913, info) /* ULT GT1.5 */
>>  
>>  #define INTEL_SKL_ULX_GT1_IDS(info) \
>> -	INTEL_VGA_DEVICE(0x190E, info) /* ULX GT1 */
>> +	INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
>> +	INTEL_VGA_DEVICE(0x1915, info) /* ULX GT1.5 */
>>  
>>  #define INTEL_SKL_GT1_IDS(info)	\
>>  	INTEL_SKL_ULT_GT1_IDS(info), \
>>  	INTEL_SKL_ULX_GT1_IDS(info), \
>>  	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
>> +	INTEL_VGA_DEVICE(0x1917, info), /* DT  GT1.5 */ \
>>  	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
>>  	INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */
>>  
>> @@ -359,21 +362,21 @@
>>  	INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */
>>  
>>  #define INTEL_SKL_ULT_GT3_IDS(info) \
>> -	INTEL_VGA_DEVICE(0x1926, info) /* ULT GT3 */
>> +	INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
>> +	INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 28W */ \
>> +	INTEL_VGA_DEVICE(0x1926, info) /* ULT GT3e */
>>  
>>  #define INTEL_SKL_GT3_IDS(info) \
>>  	INTEL_SKL_ULT_GT3_IDS(info), \
>> -	INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
>> -	INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \
>> +	INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \
>>  	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
>> -	INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3 */
>> +	INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3e */
>>  
>>  #define INTEL_SKL_GT4_IDS(info) \
>>  	INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
>>  	INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4 */ \
>>  	INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4 */ \
>> -	INTEL_VGA_DEVICE(0x192A, info), /* SRV GT4 */ \
>> -	INTEL_VGA_DEVICE(0x193A, info)  /* SRV GT4e */
>> +	INTEL_VGA_DEVICE(0x193A, info)  /* SRV GT4 */
>>  
>>  #define INTEL_SKL_IDS(info)	 \
>>  	INTEL_SKL_GT1_IDS(info), \
>> --
>> 2.26.2

-- 
Jani Nikula, Intel Open Source Graphics Center