[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: FBC fixes

[Patchwork]

== Series Details ==

Series: drm/i915: FBC fixes
URL   : https://patchwork.freedesktop.org/series/76714/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8390 -> Patchwork_17507
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17507/index.html


Changes
-------

  No changes found


Participating hosts (48 -> 41)
------------------------------

  Missing    (7): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-7500u fi-ctg-p8600 fi-kbl-7560u fi-byt-clapper 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_8390 -> Patchwork_17507

  CI-20190529: 20190529
  CI_DRM_8390: 89473e10666c78c4df9e92c9caf03d7311c291cb @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5614: d095827add11d4e8158b87683971ee659749d9a4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_17507: e3315c131c6d7813355fbd64c818dcd7eefba6ea @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

e3315c131c6d drm/i915: Suppress spurious underruns on gen2
04289a752655 drm/i915: Fix g4x fbc watermark enable
46ddb82a1501 drm/i915/fbc: Reduce fbc1 compression interval to 1 second
04304c504db1 drm/i915/fbc: Store the fbc1 compression interval in the params
d39ccd00f107 drm/i915/fbc: Parametrize FBC_CONTROL
f5b2ff08e428 drm/i915/fbc: Allow FBC to recompress after a 3D workload on i85x/i865
db225e51ab61 drm/i915/fbc: Don't clear busy_bits for origin==GTT
873203fee92b drm/i915/fbc: Enable fbc on i865
184da4f02cce drm/i915/fbc: Fix nuke for pre-snb platforms
b91927c97ffd drm/i915/fbc: Fix fence_y_offset handling
db723f635b7f drm/i915/fbc: Use the correct plane stride
1c91198476c8 drm/i915/fbc: Require linear fb stride to be multiple of 512 bytes on gen9/glk

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17507/index.html