[Intel-gfx] [PATCH 1/2] drm/i915/ggtt: Add generic i915_ggtt ballooning support
Chris Wilson
chris at chris-wilson.co.uk
Sun Aug 2 15:56:03 UTC 2020
Quoting Michal Wajdeczko (2020-08-02 16:34:09)
> Reserving part of the GGTT for the GuC requires same steps
> as in VGT GGTT ballooning. Add generic GGTT ballooning
> helpers to intel_ggtt.c to avoid code duplication.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Xiong Zhang <xiong.y.zhang at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula at intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_ggtt.c | 69 ++++++++++++++++++++++------
> drivers/gpu/drm/i915/gt/intel_gtt.h | 4 ++
> drivers/gpu/drm/i915/i915_vgpu.c | 64 +++++---------------------
> 3 files changed, 70 insertions(+), 67 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 33a3f627ddb1..7001252b4703 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -462,29 +462,17 @@ static void ggtt_unbind_vma(struct i915_address_space *vm, struct i915_vma *vma)
>
> static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt)
> {
> - u64 size;
> - int ret;
> -
> if (!intel_uc_uses_guc(&ggtt->vm.gt->uc))
> return 0;
>
> GEM_BUG_ON(ggtt->vm.total <= GUC_GGTT_TOP);
> - size = ggtt->vm.total - GUC_GGTT_TOP;
> -
> - ret = i915_gem_gtt_reserve(&ggtt->vm, &ggtt->uc_fw, size,
> - GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
> - PIN_NOEVICT);
> - if (ret)
> - drm_dbg(&ggtt->vm.i915->drm,
> - "Failed to reserve top of GGTT for GuC\n");
> -
> - return ret;
> + return i915_ggtt_balloon(ggtt, GUC_GGTT_TOP, ggtt->vm.total,
> + &ggtt->uc_fw);
I still don't buy this, this is definitely not "ballooning". And I'm yet
to be convinced that ballooning is a central concept to the i915_ggtt
itself and not a client coordination facility on top.
-Chris
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