[Intel-gfx] [PATCH v7 15/17] drm/mst: Add support for QUERY_STREAM_ENCRYPTION_STATUS MST sideband message
Sean Paul
sean at poorly.run
Tue Aug 11 14:43:38 UTC 2020
On Thu, Jul 2, 2020 at 10:49 AM Anshuman Gupta <anshuman.gupta at intel.com> wrote:
>
> On 2020-06-30 at 12:48:34 -0400, Sean Paul wrote:
> > On Tue, Jun 30, 2020 at 10:21 AM Anshuman Gupta
> > <anshuman.gupta at intel.com> wrote:
> > >
\snip
> > > > +static bool
> > > > +drm_dp_sideband_parse_query_stream_enc_status(
> > > > + struct drm_dp_sideband_msg_rx *raw,
> > > > + struct drm_dp_sideband_msg_reply_body *repmsg)
> > > > +{
> > > > + struct drm_dp_query_stream_enc_status_ack_reply *reply;
> > > > +
> > > > + reply = &repmsg->u.enc_status;
> > > > +
> > > > + reply->stream_id = raw->msg[3];
> It seems msg[0] is not part of reply data,
> could you help me with pointers, where msg is formatted.
msg[0] is the reply type, see drm_dp_sideband_parse_reply()
> > > > +
> > > > + reply->reply_signed = raw->msg[2] & BIT(0);
> > > > +
> > > > + reply->hdcp_1x_device_present = raw->msg[2] & BIT(3);
> > > > + reply->hdcp_2x_device_present = raw->msg[2] & BIT(4);
> > > > +
> > > > + reply->query_capable_device_present = raw->msg[2] & BIT(5);
> > > > + reply->legacy_device_present = raw->msg[2] & BIT(6);
> > > > + reply->unauthorizable_device_present = raw->msg[2] & BIT(7);
> > > > +
> > > > + reply->auth_completed = !!(raw->msg[1] & BIT(3));
> > > > + reply->encryption_enabled = !!(raw->msg[1] & BIT(4));
> > > > + reply->repeater_present = !!(raw->msg[1] & BIT(5));
> > > > + reply->state = (raw->msg[1] & GENMASK(7, 6)) >> 6;
> > > > +
> > > > + return true;
> > > > +}
> > > > +
/snip
> > > >
> > > > +struct drm_dp_query_stream_enc_status_ack_reply {
> > > > + /* Bit[23:16]- Stream Id */
> > > > + u8 stream_id;
> > > > +
> > > > + /* Bit[15]- Signed */
> > > > + bool reply_signed;
> > > > +
> > > > + /* Bit[10:8]- Stream Output Sink Type */
> > > > + bool unauthorizable_device_present;
> > > > + bool legacy_device_present;
> > > > + bool query_capable_device_present;
> > > > +
> > > > + /* Bit[12:11]- Stream Output CP Type */
> > > > + bool hdcp_1x_device_present;
> > > > + bool hdcp_2x_device_present;
> > > > +
> > > > + /* Bit[4]- Stream Authentication */
> > > > + bool auth_completed;
> > > > +
> > > > + /* Bit[3]- Stream Encryption */
> > > > + bool encryption_enabled;
> > > > +
> > > > + /* Bit[2]- Stream Repeater Function Present */
> > > > + bool repeater_present;
> > > > +
> > > > + /* Bit[1:0]- Stream State */
> > > > + u8 state;
> reply msg also has 20 byte of signature L' (HDCP 1.4),
Yeah, I haven't done signature parsing because we simply can't. To
compute the signature we need Link_s, which maps to M0 in HDCP 1.4
terms. The Intel HDCP bspec states "M0 cannot be exposed to
software. It is kept internal to hardware". So it's impossible to
compute/verify on the host side.
Sean
> AFAIU it has lefted out for HDCP 2.2 implementation, which is of 32 bytes for HDCP 2.2.
> Please correct me if i am wrong here.
> Thanks,
> Anshuman Gupta.
> > > > +};
> > > >
> > > > #define DRM_DP_MAX_SDP_STREAMS 16
> > > > struct drm_dp_allocate_payload {
> > > > @@ -374,6 +402,15 @@ struct drm_dp_remote_i2c_write {
> > > > u8 *bytes;
> > > > };
> > > >
> > > > +struct drm_dp_query_stream_enc_status {
> > > > + u8 stream_id;
> > > > + u8 client_id[7]; /* 56-bit nonce */
> > > > + u8 stream_event;
> > > > + bool valid_stream_event;
> > > > + u8 stream_behavior;
> > > > + u8 valid_stream_behavior;
> > > > +};
> > > > +
> > > > /* this covers ENUM_RESOURCES, POWER_DOWN_PHY, POWER_UP_PHY */
> > > > struct drm_dp_port_number_req {
> > > > u8 port_number;
> > > > @@ -422,6 +459,8 @@ struct drm_dp_sideband_msg_req_body {
> > > >
> > > > struct drm_dp_remote_i2c_read i2c_read;
> > > > struct drm_dp_remote_i2c_write i2c_write;
> > > > +
> > > > + struct drm_dp_query_stream_enc_status enc_status;
> > > > } u;
> > > > };
> > > >
> > > > @@ -444,6 +483,8 @@ struct drm_dp_sideband_msg_reply_body {
> > > > struct drm_dp_remote_i2c_read_ack_reply remote_i2c_read_ack;
> > > > struct drm_dp_remote_i2c_read_nak_reply remote_i2c_read_nack;
> > > > struct drm_dp_remote_i2c_write_ack_reply remote_i2c_write_ack;
> > > > +
> > > > + struct drm_dp_query_stream_enc_status_ack_reply enc_status;
> > > > } u;
> > > > };
> > > >
> > > > @@ -808,6 +849,9 @@ drm_dp_atomic_release_vcpi_slots(struct drm_atomic_state *state,
> > > > struct drm_dp_mst_port *port);
> > > > int drm_dp_send_power_updown_phy(struct drm_dp_mst_topology_mgr *mgr,
> > > > struct drm_dp_mst_port *port, bool power_up);
> > > > +int drm_dp_send_query_stream_enc_status(struct drm_dp_mst_topology_mgr *mgr,
> > > > + struct drm_dp_mst_port *port,
> > > > + struct drm_dp_query_stream_enc_status_ack_reply *status);
> > > > int __must_check drm_dp_mst_atomic_check(struct drm_atomic_state *state);
> > > >
> > > > void drm_dp_mst_get_port_malloc(struct drm_dp_mst_port *port);
> > > > --
> > > > Sean Paul, Software Engineer, Google / Chromium OS
> > > >
> > > > _______________________________________________
> > > > Intel-gfx mailing list
> > > > Intel-gfx at lists.freedesktop.org
> > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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