[Intel-gfx] [PATCH] drm/i915/display: Add an extra vblank wait before fbc activation

Ville Syrjälä ville.syrjala at linux.intel.com
Mon Aug 24 18:16:19 UTC 2020


On Mon, Aug 17, 2020 at 01:14:18PM +0530, Uma Shankar wrote:
> Add an extra vblank before fbc is activated.
> WA: 1409689360
> Corruption with FBC around plane 1A enabling. In the Frame Buffer
> Compression programming sequence "Display Plane Enabling with FBC"
> add a wait for vblank between plane enabling step 1 and FBC enabling
> step 2.

Already there due to drm_atomic_helper_wait_for_flip_done().

> 
> Signed-off-by: Uma Shankar <uma.shankar at intel.com>
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 2ab32e6532ff..0ed252ff2c53 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1085,10 +1085,12 @@ static void __intel_fbc_post_update(struct intel_crtc *crtc)
>  	if (!intel_fbc_can_activate(crtc))
>  		return;
>  
> -	if (!fbc->busy_bits)
> +	if (!fbc->busy_bits) {
> +		intel_wait_for_vblank(dev_priv, crtc->pipe);
>  		intel_fbc_hw_activate(dev_priv);
> -	else
> +	} else {
>  		intel_fbc_deactivate(dev_priv, "frontbuffer write");
> +	}
>  }
>  
>  void intel_fbc_post_update(struct intel_atomic_state *state,
> -- 
> 2.22.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel


More information about the Intel-gfx mailing list