[Intel-gfx] [PATCH 2/3] drm/i915/gt: rename wa_write_masked_or()
Chris Wilson
chris at chris-wilson.co.uk
Wed Dec 9 11:34:28 UTC 2020
Quoting Lucas De Marchi (2020-12-09 04:52:45)
> The use of "masked" in this function is due to its history. Once upon a
> time it received a mask and a value as parameter. Since
> commit eeec73f8a4a4 ("drm/i915/gt: Skip rmw for masked registers")
> that is not true anymore and now there is a clear and a set parameter.
> Depending on the case, that can still be thought as a mask and value,
> but there are some subtle differences: what we clear doesn't need to be
> the same bits we are setting, particularly when we are using masked
> registers.
>
> The fact that we also have "masked registers", i.e. registers whose mask
> is stored in the upper 16 bits of the register, makes it even more
> confusing, because "masked" in wa_write_masked_or() has little to do
> with masked registers, but rather refers to the old mask parameter the
> function received (that can also, but not exclusively, be used to write
> to masked register).
>
> Avoid the ambiguity and misnomer by renaming it to something else,
> hopefully less confusing: wa_write_clr_set(), to designate that we are
> doing both clr and set operations in the register.
Seems reasonable; both name and use.
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris
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