[Intel-gfx] [PATCH v4 06/11] drm/i915: refactor pll code out into intel_dpll.c

Ville Syrjälä ville.syrjala at linux.intel.com
Wed Dec 16 11:58:28 UTC 2020


On Wed, Dec 16, 2020 at 01:29:13PM +0200, Jani Nikula wrote:
<snip>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index dfa3966e5fa1..37a9f304cb55 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1811,4 +1811,17 @@ to_intel_frontbuffer(struct drm_framebuffer *fb)
>  	return fb ? to_intel_framebuffer(fb)->frontbuffer : NULL;
>  }
>  
> +static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
> +{
> +	if (dev_priv->params.panel_use_ssc >= 0)
> +		return dev_priv->params.panel_use_ssc != 0;
> +	return dev_priv->vbt.lvds_use_ssc
> +		&& !(dev_priv->quirks & QUIRK_LVDS_SSC_DISABLE);
> +}
> +
> +static inline u32 i9xx_dpll_compute_fp(struct dpll *dpll)
> +{
> +	return dpll->n << 16 | dpll->m1 << 8 | dpll->m2;
> +}

Was wondering why this is here, but looks like it's the i830 pipe power
well thing that needs it.

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

-- 
Ville Syrjälä
Intel


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