[Intel-gfx] [PATCH V2] drm/i915/cml : Add TGP PCH support

[Surendrakumar Upadhyay, TejaskumarX]

Hi,

Please note that https://patchwork.freedesktop.org/patch/398145/?series=83154 this patch is required for HDMI to work on CML + TGP PCH combo.

Thanks,
Tejas

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces at lists.freedesktop.org> On Behalf Of Tejas
> Upadhyay
> Sent: 28 December 2020 11:43
> To: intel-gfx at lists.freedesktop.org; Pandey, Hariom
> <hariom.pandey at intel.com>
> Subject: [Intel-gfx] [PATCH V2] drm/i915/cml : Add TGP PCH support
> 
> We have TGP PCH support for Tigerlake and Rocketlake. Similarly now TGP
> PCH can be used with Cometlake CPU.
> 
> Changes since V1 :
> 	- Matched HPD Pin mapping for PORT C and PORT D of CML CPU.
> 
> Cc : Matt Roper <matthew.d.roper at intel.com> Cc : Ville Syrjälä
> <ville.syrjala at linux.intel.com>
> Signed-off-by: Tejas Upadhyay
> <tejaskumarx.surendrakumar.upadhyay at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c     | 7 +++++--
>  drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
>  drivers/gpu/drm/i915/display/intel_hdmi.c    | 3 ++-
>  3 files changed, 12 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 17eaa56c5a99..181d60a5e145 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -5301,7 +5301,9 @@ static enum hpd_pin dg1_hpd_pin(struct
> drm_i915_private *dev_priv,  static enum hpd_pin tgl_hpd_pin(struct
> drm_i915_private *dev_priv,
>  				enum port port)
>  {
> -	if (port >= PORT_TC1)
> +	if (IS_COMETLAKE(dev_priv) && port >= PORT_C)
> +		return HPD_PORT_TC1 + port + 1 - PORT_TC1;
> +	else if (port >= PORT_TC1)
>  		return HPD_PORT_TC1 + port - PORT_TC1;
>  	else
>  		return HPD_PORT_A + port - PORT_A;
> @@ -5455,7 +5457,8 @@ void intel_ddi_init(struct drm_i915_private
> *dev_priv, enum port port)
> 
>  	if (IS_DG1(dev_priv))
>  		encoder->hpd_pin = dg1_hpd_pin(dev_priv, port);
> -	else if (IS_ROCKETLAKE(dev_priv))
> +	else if (IS_ROCKETLAKE(dev_priv) || (IS_COMETLAKE(dev_priv) &&
> +					     HAS_PCH_TGP(dev_priv)))
>  		encoder->hpd_pin = rkl_hpd_pin(dev_priv, port);
>  	else if (INTEL_GEN(dev_priv) >= 12)
>  		encoder->hpd_pin = tgl_hpd_pin(dev_priv, port); diff --git
> a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index f2c48e5cdb43..47014471658f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -16163,6 +16163,11 @@ static void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
>  			intel_ddi_init(dev_priv, PORT_F);
> 
>  		icl_dsi_init(dev_priv);
> +	} else if (IS_COMETLAKE(dev_priv) && HAS_PCH_TGP(dev_priv)) {
> +		intel_ddi_init(dev_priv, PORT_A);
> +		intel_ddi_init(dev_priv, PORT_B);
> +		intel_ddi_init(dev_priv, PORT_C);
> +		intel_ddi_init(dev_priv, PORT_D);
>  	} else if (IS_GEN9_LP(dev_priv)) {
>  		/*
>  		 * FIXME: Broxton doesn't support port detection via the diff -
> -git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index c5959590562b..540c9d54b595 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -3174,7 +3174,8 @@ static u8 intel_hdmi_ddc_pin(struct intel_encoder
> *encoder)
> 
>  	if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1)
>  		ddc_pin = dg1_port_to_ddc_pin(dev_priv, port);
> -	else if (IS_ROCKETLAKE(dev_priv))
> +	else if (IS_ROCKETLAKE(dev_priv) || (IS_COMETLAKE(dev_priv) &&
> +					     HAS_PCH_TGP(dev_priv)))
>  		ddc_pin = rkl_port_to_ddc_pin(dev_priv, port);
>  	else if (HAS_PCH_MCC(dev_priv))
>  		ddc_pin = mcc_port_to_ddc_pin(dev_priv, port);
> --
> 2.28.0
> 
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