[Intel-gfx] [PATCH 10/13] drm/i915/pps: rename intel_power_sequencer_reset to intel_pps_reset_all

[Anshuman Gupta]

On 2020-12-22 at 20:19:50 +0530, Jani Nikula wrote:
> Follow the usual naming pattern for functions. "reset all" because it
> iterates over all DP encoders.
Looks good to me.
Reviewed-by: Anshuman Gupta <anshuman.gupta at intel.com>
> 
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 4 ++--
>  drivers/gpu/drm/i915/display/intel_pps.c           | 5 ++---
>  drivers/gpu/drm/i915/display/intel_pps.h           | 2 +-
>  3 files changed, 5 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index a11bd8213df4..c11c37c65d86 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -936,7 +936,7 @@ static void bxt_enable_dc9(struct drm_i915_private *dev_priv)
>  	 * because PPS registers are always on.
>  	 */
>  	if (!HAS_PCH_SPLIT(dev_priv))
> -		intel_power_sequencer_reset(dev_priv);
> +		intel_pps_reset_all(dev_priv);
>  	gen9_set_dc_state(dev_priv, DC_STATE_EN_DC9);
>  }
>  
> @@ -1446,7 +1446,7 @@ static void vlv_display_power_well_deinit(struct drm_i915_private *dev_priv)
>  	/* make sure we're done processing display irqs */
>  	intel_synchronize_irq(dev_priv);
>  
> -	intel_power_sequencer_reset(dev_priv);
> +	intel_pps_reset_all(dev_priv);
>  
>  	/* Prevent us from re-enabling polling on accident in late suspend */
>  	if (!dev_priv->drm.dev->power.is_suspended)
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index dfd6722bc40e..ceb6de9e7aff 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -22,8 +22,7 @@ intel_wakeref_t intel_pps_lock(struct intel_dp *intel_dp)
>  	intel_wakeref_t wakeref;
>  
>  	/*
> -	 * See intel_power_sequencer_reset() why we need
> -	 * a power domain reference here.
> +	 * See intel_pps_reset_all() why we need a power domain reference here.
>  	 */
>  	wakeref = intel_display_power_get(dev_priv,
>  					  intel_aux_power_domain(dp_to_dig_port(intel_dp)));
> @@ -316,7 +315,7 @@ vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp)
>  	intel_dp_init_panel_power_sequencer_registers(intel_dp, false);
>  }
>  
> -void intel_power_sequencer_reset(struct drm_i915_private *dev_priv)
> +void intel_pps_reset_all(struct drm_i915_private *dev_priv)
>  {
>  	struct intel_encoder *encoder;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
> index 8dda282abd42..451d5125b2b7 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.h
> +++ b/drivers/gpu/drm/i915/display/intel_pps.h
> @@ -42,7 +42,7 @@ void wait_panel_power_cycle(struct intel_dp *intel_dp);
>  
>  void intel_pps_init(struct intel_dp *intel_dp);
>  void intel_pps_reinit(struct intel_dp *intel_dp);
> -void intel_power_sequencer_reset(struct drm_i915_private *i915);
> +void intel_pps_reset_all(struct drm_i915_private *i915);
>  
>  void vlv_init_panel_power_sequencer(struct intel_encoder *encoder,
>  				    const struct intel_crtc_state *crtc_state);
> -- 
> 2.20.1
> 
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