[Intel-gfx] [PATCH] drm/i915/gt: Fix rc6 on Ivybridge

Chris Wilson chris at chris-wilson.co.uk
Tue Feb 4 09:09:48 UTC 2020


Quoting Andi Shyti (2020-02-04 09:06:36)
> Hi Chris,
> 
> > The current rc6 threshold is larger than the evaluation interval on
> > Ivybridge; it never enters rc6. Remove the special casing so it behaves
> > like the other gen6/gen7, and we see rc6 residencies before we manually
> > park the system.
> > 
> > Closes: https://gitlab.freedesktop.org/drm/intel/issues/1114
> > Testcase: igt/i915_pm_rc6_residency/rc6-idle #ivb
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Andi Shyti <andi.shyti at intel.com>
> > ---
> >  drivers/gpu/drm/i915/gt/intel_rc6.c | 5 +----
> >  1 file changed, 1 insertion(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
> > index 01a99fdbb3c4..682f598f7042 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_rc6.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
> > @@ -226,10 +226,7 @@ static void gen6_rc6_enable(struct intel_rc6 *rc6)
> >  
> >       set(uncore, GEN6_RC_SLEEP, 0);
> >       set(uncore, GEN6_RC1e_THRESHOLD, 1000);
> > -     if (IS_IVYBRIDGE(i915))
> > -             set(uncore, GEN6_RC6_THRESHOLD, 125000);
> > -     else
> > -             set(uncore, GEN6_RC6_THRESHOLD, 50000);
> > +     set(uncore, GEN6_RC6_THRESHOLD, 50000);
> 
> why was is set like this in a first place?

No one knows.
-Chris


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