[Intel-gfx] [PATCH 7/7] drm/i915: Enable 3 display pipes support

Anshuman Gupta anshuman.gupta at intel.com
Tue Feb 4 11:29:27 UTC 2020


Allow 3-display pipes SKU system with any combination
in INTEL_INFO pipe mask.
B.Spec:50075

changes since RFC:
- using intel_pipe_mask_is_valid() function to check integrity of
  pipe_mask. [Ville]

Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta at intel.com>
---
 drivers/gpu/drm/i915/intel_device_info.c | 38 +++++++++++++++++-------
 1 file changed, 28 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index fcdacd6d4aa5..caf93a68a056 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -896,6 +896,30 @@ void intel_device_info_subplatform_init(struct drm_i915_private *i915)
 	RUNTIME_INFO(i915)->platform_mask[pi] |= mask;
 }
 
+static bool
+intel_pipe_mask_is_valid(struct drm_i915_private *dev_priv, u8 pipe_mask)
+{
+	/*
+	 * At least one pipe should be enabled.
+	 */
+	if (pipe_mask == 0)
+		return false;
+	/*
+	 * if there are disabled pipes they should be the last ones,
+	 * with no holses in the mask for Dispaly Gen<=12.
+	 */
+	if (!is_power_of_2(pipe_mask + 1)) {
+		if (INTEL_GEN(dev_priv) <= 11)
+			return false;
+		else if (IS_TIGERLAKE(dev_priv))
+			return false;
+		else if (IS_GEN(dev_priv, 12))
+			return true;
+	}
+
+	return true;
+}
+
 /**
  * intel_device_info_runtime_init - initialize runtime info
  * @dev_priv: the i915 device
@@ -995,17 +1019,11 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
 		    (dfsm & TGL_DFSM_PIPE_D_DISABLE))
 			enabled_mask &= ~BIT(PIPE_D);
 
-		/*
-		 * At least one pipe should be enabled and if there are
-		 * disabled pipes, they should be the last ones, with no holes
-		 * in the mask.
-		 */
-		if (enabled_mask == 0 || !is_power_of_2(enabled_mask + 1))
-			drm_err(&dev_priv->drm,
-				"invalid pipe fuse configuration: enabled_mask=0x%x\n",
-				enabled_mask);
-		else
+		if (intel_pipe_mask_is_valid(dev_priv, enabled_mask))
 			info->pipe_mask = enabled_mask;
+		else
+			drm_err(&dev_priv->drm, "invalid pipe fuse configuration: enabled_mask=0x%x\n",
+				enabled_mask);
 
 		if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE)
 			info->display.has_hdcp = 0;
-- 
2.24.0



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