[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gt: Set the PP_DIR registers upon enabling ring submission
Patchwork
patchwork at emeril.freedesktop.org
Thu Feb 6 01:27:40 UTC 2020
== Series Details ==
Series: series starting with [1/2] drm/i915/gt: Set the PP_DIR registers upon enabling ring submission
URL : https://patchwork.freedesktop.org/series/73059/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7871 -> Patchwork_16445
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16445/index.html
Known issues
------------
Here are the changes found in Patchwork_16445 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt at gem_exec_parallel@fds:
- fi-hsw-4770r: [PASS][1] -> [INCOMPLETE][2] ([i915#694])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7871/fi-hsw-4770r/igt@gem_exec_parallel@fds.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16445/fi-hsw-4770r/igt@gem_exec_parallel@fds.html
* igt at gem_mmap_gtt@basic:
- fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([CI#94] / [i915#402])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7871/fi-tgl-y/igt@gem_mmap_gtt@basic.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16445/fi-tgl-y/igt@gem_mmap_gtt@basic.html
* igt at i915_selftest@live_blt:
- fi-ivb-3770: [PASS][5] -> [DMESG-FAIL][6] ([i915#725])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7871/fi-ivb-3770/igt@i915_selftest@live_blt.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16445/fi-ivb-3770/igt@i915_selftest@live_blt.html
#### Possible fixes ####
* igt at i915_selftest@live_gtt:
- fi-icl-guc: [TIMEOUT][7] ([fdo#112271]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7871/fi-icl-guc/igt@i915_selftest@live_gtt.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16445/fi-icl-guc/igt@i915_selftest@live_gtt.html
* igt at kms_addfb_basic@bad-pitch-128:
- fi-tgl-y: [DMESG-WARN][9] ([CI#94] / [i915#402]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7871/fi-tgl-y/igt@kms_addfb_basic@bad-pitch-128.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16445/fi-tgl-y/igt@kms_addfb_basic@bad-pitch-128.html
[CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
Participating hosts (45 -> 43)
------------------------------
Additional (6): fi-bdw-5557u fi-hsw-peppy fi-bwr-2160 fi-ilk-650 fi-kbl-7500u fi-gdg-551
Missing (8): fi-kbl-soraka fi-skl-6770hq fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-bsw-kefka fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7871 -> Patchwork_16445
CI-20190529: 20190529
CI_DRM_7871: c9b0237ee7ffb1bbb62f864f0b2d7b290ee1313d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5419: 44913a91e77434b03001bb9ea53216cd03c476e6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16445: df55045a913e542322e952f262b34bc9437d6f48 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
df55045a913e drm/i915/gt: Stop invalidating the PD cachelines for gen7
ceceb2b0658f drm/i915/gt: Set the PP_DIR registers upon enabling ring submission
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16445/index.html
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