[Intel-gfx] [PATCH 1/2] drm/i915/ehl: Update port clock voltage level requirements

[Souza, Jose]

On Thu, 2020-02-06 at 16:14 -0800, Matt Roper wrote:
> Voltage level depends not only on the cdclk, but also on the DDI
> clock.
> Last time the bspec voltage level table for EHL was updated, we only
> updated the cdclk requirements, but forgot to account for the new
> port
> clock criteria.
> 

Reviewed-by: José Roberto de Souza <jose.souza at intel.com>

> Bspec: 21809
> Fixes: d147483884ed ("drm/i915/ehl: Update voltage level checks")
> Cc: José Roberto de Souza <jose.souza at intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 4c5f32e50554..ff638fc6e3f5 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4206,7 +4206,9 @@ static bool intel_ddi_is_audio_enabled(struct
> drm_i915_private *dev_priv,
>  void intel_ddi_compute_min_voltage_level(struct drm_i915_private
> *dev_priv,
>  					 struct intel_crtc_state
> *crtc_state)
>  {
> -	if (INTEL_GEN(dev_priv) >= 11 && crtc_state->port_clock >
> 594000)
> +	if (IS_ELKHARTLAKE(dev_priv) && crtc_state->port_clock >
> 594000)
> +		crtc_state->min_voltage_level = 3;
> +	else if (INTEL_GEN(dev_priv) >= 11 && crtc_state->port_clock >
> 594000)
>  		crtc_state->min_voltage_level = 1;
>  	else if (IS_CANNONLAKE(dev_priv) && crtc_state->port_clock >
> 594000)
>  		crtc_state->min_voltage_level = 2;