[Intel-gfx] [PATCH] drm/i915: Avoid potential division-by-zero in computing CS timestamp period

[Chris Wilson]

Since we use a HW readback or estimation of the CS timestamp frequency,
sometimes it may result in 0. Avoid the division-by-zero in computing
its reciprocal, the timestamp period.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_device_info.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index a97437fac884..18d9de488593 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -1044,13 +1044,17 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
 	}
 
 	/* Initialize command stream timestamp frequency */
-	runtime->cs_timestamp_frequency_khz = read_timestamp_frequency(dev_priv);
-	runtime->cs_timestamp_period_ns =
-		div_u64(1e6, runtime->cs_timestamp_frequency_khz);
-	drm_dbg(&dev_priv->drm,
-		"CS timestamp wraparound in %lldms\n",
-		div_u64(mul_u32_u32(runtime->cs_timestamp_period_ns, S32_MAX),
-			USEC_PER_SEC));
+	runtime->cs_timestamp_frequency_khz =
+		read_timestamp_frequency(dev_priv);
+	if (runtime->cs_timestamp_frequency_khz) {
+		runtime->cs_timestamp_period_ns =
+			div_u64(1e6, runtime->cs_timestamp_frequency_khz);
+		drm_dbg(&dev_priv->drm,
+			"CS timestamp wraparound in %lldms\n",
+			div_u64(mul_u32_u32(runtime->cs_timestamp_period_ns,
+					    S32_MAX),
+				USEC_PER_SEC));
+	}
 }
 
 void intel_driver_caps_print(const struct intel_driver_caps *caps,
-- 
2.25.0