[Intel-gfx] [PATCH] drm/i915: Avoid potential division-by-zero in computing CS timestamp period
Lionel Landwerlin
lionel.g.landwerlin at intel.com
Tue Feb 18 22:10:43 UTC 2020
On 19/02/2020 00:03, Chris Wilson wrote:
> Quoting Lionel Landwerlin (2020-02-18 21:54:03)
>> On 16/02/2020 18:17, Chris Wilson wrote:
>>> Since we use a HW readback or estimation of the CS timestamp frequency,
>>> sometimes it may result in 0. Avoid the division-by-zero in computing
>>> its reciprocal, the timestamp period.
>>>
>>> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
>>> ---
>>> drivers/gpu/drm/i915/intel_device_info.c | 18 +++++++++++-------
>>> 1 file changed, 11 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
>>> index a97437fac884..18d9de488593 100644
>>> --- a/drivers/gpu/drm/i915/intel_device_info.c
>>> +++ b/drivers/gpu/drm/i915/intel_device_info.c
>>> @@ -1044,13 +1044,17 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
>>> }
>>>
>>> /* Initialize command stream timestamp frequency */
>>> - runtime->cs_timestamp_frequency_khz = read_timestamp_frequency(dev_priv);
>>> - runtime->cs_timestamp_period_ns =
>>> - div_u64(1e6, runtime->cs_timestamp_frequency_khz);
>>> - drm_dbg(&dev_priv->drm,
>>> - "CS timestamp wraparound in %lldms\n",
>>> - div_u64(mul_u32_u32(runtime->cs_timestamp_period_ns, S32_MAX),
>>> - USEC_PER_SEC));
>>> + runtime->cs_timestamp_frequency_khz =
>>> + read_timestamp_frequency(dev_priv);
>>> + if (runtime->cs_timestamp_frequency_khz) {
>>> + runtime->cs_timestamp_period_ns =
>>> + div_u64(1e6, runtime->cs_timestamp_frequency_khz);
>>> + drm_dbg(&dev_priv->drm,
>>> + "CS timestamp wraparound in %lldms\n",
>>> + div_u64(mul_u32_u32(runtime->cs_timestamp_period_ns,
>>> + S32_MAX),
>>> + USEC_PER_SEC));
>>> + }
>> Arg this is used in i915-perf in at least one place as denominator too...
> This was a quick fix for BAT. See
> https://patchwork.freedesktop.org/patch/353455/?series=73507&rev=1
> then there are only a handful of platforms for which we don't know the
> frequency, none of which matter for i915-perf.
> -Chris
Ah, you got me worried :)
Acked-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
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