[Intel-gfx] [PATCH] drm/i915: Extend Wa_1606931601 for all steppings.

[Matt Roper]

On Tue, Feb 18, 2020 at 07:59:02PM -0800, Anusha Srivatsa wrote:
> Previously known by the WA number - Wa_1607090982, extend
> the WA (Disable Early Read and Src Swap (bit 14) by
> setting the chicken register.) to all steppings.

This description is a bit hard to follow; maybe something like this
would be more clear?

        """
        drm/i915: Extend Wa_1606931601 for all steppings

        According to the bspec, Wa_1606931601 applies to all TGL
        steppings so we need to move it out of the the A0-only block
        of rcs_engine_wa_init().

        Note that this workaround has also been referred to by an
        alternate name Wa_1607090982 in some previous patches.
        """

> 
> The WA is implemented in -
> 3873fd1a43c7 ("drm/i915: Use engine wa list for Wa_1607090982")

This sentence can be dropped in favor of the formal "Fixes:" line below.

> 
> Bspec: 46045,52890
> 

Please add a

Fixes: 3873fd1a43c7 ("drm/i915: Use engine wa list for Wa_1607090982")

line here to make sure that maintainer tools will properly
apply/backport this fix to all the appropriate trees.

> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>

Aside from the above this looks good, so

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

with an updated commit message.


Matt

> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 12 +++++++-----
>  1 file changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 887e0dc701f7..7cc8a7fc53c7 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1329,6 +1329,13 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
>  {
>  	struct drm_i915_private *i915 = engine->i915;
>  
> +	if (IS_TIGERLAKE(i915)) {
> +		/* Wa_1606931601:tgl */
> +		wa_masked_en(wal,
> +			     GEN7_ROW_CHICKEN2,
> +			     GEN12_DISABLE_EARLY_READ);
> +	}
> +
>  	if (IS_TGL_REVID(i915, TGL_REVID_A0, TGL_REVID_A0)) {
>  		/* Wa_1606700617:tgl */
>  		wa_masked_en(wal,
> @@ -1360,11 +1367,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
>  		wa_write_or(wal,
>  			    GEN7_FF_THREAD_MODE,
>  			    GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
> -
> -		/* Wa_1606931601:tgl */
> -		wa_masked_en(wal,
> -			     GEN7_ROW_CHICKEN2,
> -			     GEN12_DISABLE_EARLY_READ);
>  	}
>  
>  	if (IS_GEN(i915, 11)) {
> -- 
> 2.25.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795