[Intel-gfx] [PATCH 3/4] fix

[Chris Wilson]

---
 drivers/gpu/drm/i915/gt/gen7_renderclear.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen7_renderclear.c b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
index 2c3aabc72b4e..beeb2e82c6fe 100644
--- a/drivers/gpu/drm/i915/gt/gen7_renderclear.c
+++ b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
@@ -90,7 +90,7 @@ static u32 batch_addr(const struct batch_chunk *bc)
 
 static void batch_add(struct batch_chunk *bc, const u32 d)
 {
-	GEM_DEBUG_WARN_ON((bc->end - bc->start) >= bc->max_items);
+	GEM_BUG_ON(bc->end - bc->start >= bc->max_items);
 	*bc->end++ = d;
 }
 
@@ -154,11 +154,10 @@ static u32
 gen7_fill_binding_table(struct batch_chunk *state,
 			const struct batch_vals *bv)
 {
+	u32 surface_start = gen7_fill_surface_state(state, bv->batch_size, bv);
 	u32 *cs = batch_alloc_items(state, 32, 8);
 	u32 offset = batch_offset(state, cs);
-	u32 surface_start;
 
-	surface_start = gen7_fill_surface_state(state, bv->batch_size, bv);
 	*cs++ = surface_start - state->offset;
 	*cs++ = 0;
 	*cs++ = 0;
@@ -188,13 +187,16 @@ gen7_fill_interface_descriptor(struct batch_chunk *state,
 			       const struct cb_kernel *kernel,
 			       unsigned int count)
 {
+	u32 kernel_offset =
+		gen7_fill_kernel_data(state, kernel->data, kernel->size);
+	u32 binding_table = gen7_fill_binding_table(state, bv);
 	u32 *cs = batch_alloc_items(state, 32, 8 * count);
 	u32 offset = batch_offset(state, cs);
 
-	*cs++ = gen7_fill_kernel_data(state, kernel->data, kernel->size);
+	*cs++ = kernel_offset;
 	*cs++ = (1 << 7) | (1 << 13);
 	*cs++ = 0;
-	*cs++ = (gen7_fill_binding_table(state, bv) - state->offset) | 1;
+	*cs++ = (binding_table - state->offset) | 1;
 	*cs++ = 0;
 	*cs++ = 0;
 	*cs++ = 0;
-- 
2.25.1