[Intel-gfx] [PATCH 2/2] drm/i915/tgl: Program MBUS_ABOX{1, 2}_CTL during display init

[Matt Atwood]

On Mon, Feb 03, 2020 at 05:10:32PM -0800, Matt Roper wrote:
> On gen11 we only needed to program MBus credits into MBUS_ABOX_CTL
> during display initialization, but on gen12 we're now supposed to
> program the same values into MBUS_ABOX1_CTL and MBUS_ABOX2_CTL as well.
> 
> v2:
>  - Program registers with rmw to preserve contents of unrelated bits.
>  - Switch to the new display uncore helpers.
> 
> Bspec: 49213
> Bspec: 50096
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood at intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 4 ++++
>  drivers/gpu/drm/i915/i915_reg.h                    | 2 ++
>  2 files changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 529319c962e8..f638691cda6e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -4516,6 +4516,10 @@ static void icl_mbus_init(struct drm_i915_private *dev_priv)
>  		MBUS_ABOX_BW_CREDIT(1);
>  
>  	intel_de_rmw(dev_priv, MBUS_ABOX_CTL, mask, val);
> +	if (INTEL_GEN(dev_priv) >= 12) {
> +		intel_de_rmw(dev_priv, MBUS_ABOX1_CTL, mask, val);
> +		intel_de_rmw(dev_priv, MBUS_ABOX2_CTL, mask, val);
> +	}
>  }
>  
>  static void hsw_assert_cdclk(struct drm_i915_private *dev_priv)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 0bd431f6a011..d3df704ee099 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2865,6 +2865,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
>  #define MI_ARB_STATE	_MMIO(0x20e4) /* 915+ only */
>  
>  #define MBUS_ABOX_CTL			_MMIO(0x45038)
> +#define MBUS_ABOX1_CTL			_MMIO(0x45048)
> +#define MBUS_ABOX2_CTL			_MMIO(0x4504C)
>  #define MBUS_ABOX_BW_CREDIT_MASK	(3 << 20)
>  #define MBUS_ABOX_BW_CREDIT(x)		((x) << 20)
>  #define MBUS_ABOX_B_CREDIT_MASK		(0xF << 16)
> -- 
> 2.24.1
> 
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