[Intel-gfx] [PATCH 2/8] drm/i915/tgl: Implement Wa_1409804808

[Matt Roper]

On Fri, Feb 21, 2020 at 06:08:09PM -0800, José Roberto de Souza wrote:
> This workaround the CS not done issue on PIPE_CONTROL.
> 
> BSpec: 52890
> BSpec: 46218
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 ++++++
>  drivers/gpu/drm/i915/i915_reg.h             | 5 +++--
>  2 files changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 887e0dc701f7..57a5a39ee902 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1367,6 +1367,12 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
>  			     GEN12_DISABLE_EARLY_READ);
>  	}
>  
> +	if (IS_TIGERLAKE(i915)) {
> +		/* Wa_1409804808:tgl */
> +		wa_masked_en(wal, GEN7_ROW_CHICKEN2,
> +			     GEN12_PUSH_CONSTANT_DEREFERENCE_HOLD_DISABLE);
> +	}
> +
>  	if (IS_GEN(i915, 11)) {
>  		/* This is not an Wa. Enable for better image quality */
>  		wa_masked_en(wal,
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index f45b5e86ec63..cfc238ffd4ae 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9149,8 +9149,9 @@ enum {
>  #define   THROTTLE_12_5				(7 << 2)
>  #define   DISABLE_EARLY_EOT			(1 << 1)
>  
> -#define GEN7_ROW_CHICKEN2		_MMIO(0xe4f4)
> -#define GEN12_DISABLE_EARLY_READ	BIT(14)
> +#define GEN7_ROW_CHICKEN2				_MMIO(0xe4f4)
> +#define GEN12_DISABLE_EARLY_READ			BIT(14)
> +#define GEN12_PUSH_CONSTANT_DEREFERENCE_HOLD_DISABLE	BIT(8)

We should probably take this opportunity to s/BIT/REG_BIT/ too.

This is also kind of a long name.  You could potentially shorten some of
the words like we do for other bit names.  E.g.,
GEN12_PUSH_CONST_DEREF_HOLD_DIS..  Up to you.

Otherwise,

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>


Matt

>  
>  #define GEN7_ROW_CHICKEN2_GT2		_MMIO(0xf4f4)
>  #define   DOP_CLOCK_GATING_DISABLE	(1 << 0)
> -- 
> 2.25.1
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795