[Intel-gfx] [PATCH 4/8] drm/i915/tgl: Add Wa_1409085225, Wa_14010229206
Matt Roper
matthew.d.roper at intel.com
Mon Feb 24 16:27:32 UTC 2020
On Fri, Feb 21, 2020 at 06:08:11PM -0800, José Roberto de Souza wrote:
> From: Matt Atwood <matthew.s.atwood at intel.com>
>
> Disable Push Constant buffer addition for TGL.
>
> v2: typos, add additional Wa reference
> v3: use REG_BIT macro, move to rcs_engine_wa_init, clean up commit
> message.
>
> Bspec: 52890
> Cc: Rafael Antognolli <rafael.antognolli at intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Signed-off-by: Matt Atwood <matthew.s.atwood at intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 ++++++
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> 2 files changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index fbed5bdc9e04..e9619c493e6a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1369,6 +1369,12 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
> wa_masked_en(wal,
> GEN7_ROW_CHICKEN2,
> GEN12_DISABLE_EARLY_READ);
> +
> + /*
> + * Wa_1409085225:tgl
> + * Wa_14010229206:tgl
> + */
> + wa_masked_en(wal, GEN9_ROW_CHICKEN4, GEN12_DISABLE_TDL_PUSH);
> }
>
> if (IS_TIGERLAKE(i915)) {
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 49872a1dc7a4..78164fa9e574 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9159,6 +9159,9 @@ enum {
> #define PUSH_CONSTANT_DEREF_DISABLE (1 << 8)
> #define GEN11_TDL_CLOCK_GATING_FIX_DISABLE (1 << 1)
>
> +#define GEN9_ROW_CHICKEN4 _MMIO(0xe48c)
> +#define GEN12_DISABLE_TDL_PUSH REG_BIT(9)
> +
> #define HSW_ROW_CHICKEN3 _MMIO(0xe49c)
> #define HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE (1 << 6)
>
> --
> 2.25.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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