[Intel-gfx] [PATCH v2 03/20] drm/i915: Add missing commas to dbuf tables

[Jani Nikula]

On Tue, 25 Feb 2020, Ville Syrjala <ville.syrjala at linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> The preferred style is to sprinkle commas after each array and
> structure initialization, whether or not it happens to be the
> last element/member (only exception being sentinel entries which
> never have anything after them). This leads to much prettier
> diffs if/when new elements/members get added to the end of the
> initialization. We're not bound by some ancient silly mandate
> to omit the final comma.
>
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula at intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 88 ++++++++++++++++-----------------
>  1 file changed, 44 insertions(+), 44 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 59fc461bc454..abeb4b19071f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4184,49 +4184,49 @@ static const struct dbuf_slice_conf_entry icl_allowed_dbufs[] =
>  	{
>  		.active_pipes = BIT(PIPE_A),
>  		.dbuf_mask = {
> -			[PIPE_A] = BIT(DBUF_S1)
> -		}
> +			[PIPE_A] = BIT(DBUF_S1),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_B),
>  		.dbuf_mask = {
> -			[PIPE_B] = BIT(DBUF_S1)
> -		}
> +			[PIPE_B] = BIT(DBUF_S1),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_A) | BIT(PIPE_B),
>  		.dbuf_mask = {
>  			[PIPE_A] = BIT(DBUF_S1),
> -			[PIPE_B] = BIT(DBUF_S2)
> -		}
> +			[PIPE_B] = BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_C),
>  		.dbuf_mask = {
> -			[PIPE_C] = BIT(DBUF_S2)
> -		}
> +			[PIPE_C] = BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_A) | BIT(PIPE_C),
>  		.dbuf_mask = {
>  			[PIPE_A] = BIT(DBUF_S1),
> -			[PIPE_C] = BIT(DBUF_S2)
> -		}
> +			[PIPE_C] = BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_B) | BIT(PIPE_C),
>  		.dbuf_mask = {
>  			[PIPE_B] = BIT(DBUF_S1),
> -			[PIPE_C] = BIT(DBUF_S2)
> -		}
> +			[PIPE_C] = BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
>  		.dbuf_mask = {
>  			[PIPE_A] = BIT(DBUF_S1),
>  			[PIPE_B] = BIT(DBUF_S1),
> -			[PIPE_C] = BIT(DBUF_S2)
> -		}
> +			[PIPE_C] = BIT(DBUF_S2),
> +		},
>  	},
>  };
>  
> @@ -4246,100 +4246,100 @@ static const struct dbuf_slice_conf_entry tgl_allowed_dbufs[] =
>  	{
>  		.active_pipes = BIT(PIPE_A),
>  		.dbuf_mask = {
> -			[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2)
> -		}
> +			[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_B),
>  		.dbuf_mask = {
> -			[PIPE_B] = BIT(DBUF_S1) | BIT(DBUF_S2)
> -		}
> +			[PIPE_B] = BIT(DBUF_S1) | BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_A) | BIT(PIPE_B),
>  		.dbuf_mask = {
>  			[PIPE_A] = BIT(DBUF_S2),
> -			[PIPE_B] = BIT(DBUF_S1)
> -		}
> +			[PIPE_B] = BIT(DBUF_S1),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_C),
>  		.dbuf_mask = {
> -			[PIPE_C] = BIT(DBUF_S2) | BIT(DBUF_S1)
> -		}
> +			[PIPE_C] = BIT(DBUF_S2) | BIT(DBUF_S1),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_A) | BIT(PIPE_C),
>  		.dbuf_mask = {
>  			[PIPE_A] = BIT(DBUF_S1),
> -			[PIPE_C] = BIT(DBUF_S2)
> -		}
> +			[PIPE_C] = BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_B) | BIT(PIPE_C),
>  		.dbuf_mask = {
>  			[PIPE_B] = BIT(DBUF_S1),
> -			[PIPE_C] = BIT(DBUF_S2)
> -		}
> +			[PIPE_C] = BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
>  		.dbuf_mask = {
>  			[PIPE_A] = BIT(DBUF_S1),
>  			[PIPE_B] = BIT(DBUF_S1),
> -			[PIPE_C] = BIT(DBUF_S2)
> -		}
> +			[PIPE_C] = BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_D),
>  		.dbuf_mask = {
> -			[PIPE_D] = BIT(DBUF_S2) | BIT(DBUF_S1)
> -		}
> +			[PIPE_D] = BIT(DBUF_S2) | BIT(DBUF_S1),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_A) | BIT(PIPE_D),
>  		.dbuf_mask = {
>  			[PIPE_A] = BIT(DBUF_S1),
> -			[PIPE_D] = BIT(DBUF_S2)
> -		}
> +			[PIPE_D] = BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_B) | BIT(PIPE_D),
>  		.dbuf_mask = {
>  			[PIPE_B] = BIT(DBUF_S1),
> -			[PIPE_D] = BIT(DBUF_S2)
> -		}
> +			[PIPE_D] = BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_D),
>  		.dbuf_mask = {
>  			[PIPE_A] = BIT(DBUF_S1),
>  			[PIPE_B] = BIT(DBUF_S1),
> -			[PIPE_D] = BIT(DBUF_S2)
> -		}
> +			[PIPE_D] = BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_C) | BIT(PIPE_D),
>  		.dbuf_mask = {
>  			[PIPE_C] = BIT(DBUF_S1),
> -			[PIPE_D] = BIT(DBUF_S2)
> -		}
> +			[PIPE_D] = BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_A) | BIT(PIPE_C) | BIT(PIPE_D),
>  		.dbuf_mask = {
>  			[PIPE_A] = BIT(DBUF_S1),
>  			[PIPE_C] = BIT(DBUF_S2),
> -			[PIPE_D] = BIT(DBUF_S2)
> -		}
> +			[PIPE_D] = BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
>  		.dbuf_mask = {
>  			[PIPE_B] = BIT(DBUF_S1),
>  			[PIPE_C] = BIT(DBUF_S2),
> -			[PIPE_D] = BIT(DBUF_S2)
> -		}
> +			[PIPE_D] = BIT(DBUF_S2),
> +		},
>  	},
>  	{
>  		.active_pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
> @@ -4347,8 +4347,8 @@ static const struct dbuf_slice_conf_entry tgl_allowed_dbufs[] =
>  			[PIPE_A] = BIT(DBUF_S1),
>  			[PIPE_B] = BIT(DBUF_S1),
>  			[PIPE_C] = BIT(DBUF_S2),
> -			[PIPE_D] = BIT(DBUF_S2)
> -		}
> +			[PIPE_D] = BIT(DBUF_S2),
> +		},
>  	},
>  };

-- 
Jani Nikula, Intel Open Source Graphics Center