[Intel-gfx] [PATCH] drm/i915/ggtt: do not set bits 1-11 in gen12 ptes

[Chris Wilson]

Quoting Mika Kuoppala (2020-02-27 10:51:46)
> Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com> writes:
> >  static void gen8_set_pte(void __iomem *addr, gen8_pte_t pte)
> >  {
> >       writeq(pte, addr);
> > @@ -172,7 +179,7 @@ static void gen8_ggtt_insert_page(struct i915_address_space *vm,
> >       gen8_pte_t __iomem *pte =
> >               (gen8_pte_t __iomem *)ggtt->gsm + offset / I915_GTT_PAGE_SIZE;
> >  
> > -     gen8_set_pte(pte, gen8_pte_encode(addr, level, 0));
> > +     gen8_set_pte(pte, gen8_ggtt_pte_encode(addr, level, 0));
> 
> Make me ponder why we don't use the vm->pte_encode all the way
> as we have it :P

Don't use vfuncs if the target routine is known.

Apparently it's even cheaper to do a bsearch on a page of target
routines than it is to use retpolines.

Anyway, the era of vfuncs is over.
-Chris