[Intel-gfx] [PATCH v3 02/11] drm/i915/tgl: Implement Wa_1806527549

[Matt Roper]

On Thu, Feb 27, 2020 at 02:00:52PM -0800, José Roberto de Souza wrote:
> This will whitelist the HIZ_CHICKEN register so mesa can disable the
> optimizations and avoid hang when using D16_UNORM.
> 
> v2: moved to the right place and used the right function() (Chris)
> 
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Cc: Rafael Antognolli <rafael.antognolli at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index d402b8ebc780..5d85b7531f76 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1259,6 +1259,9 @@ static void tgl_whitelist_build(struct intel_engine_cs *engine)
>  
>  		/* Wa_1808121037:tgl */
>  		whitelist_reg(w, GEN7_COMMON_SLICE_CHICKEN1);
> +
> +		/* Wa_1806527549:tgl */
> +		whitelist_reg(w, HIZ_CHICKEN);
>  		break;
>  	default:
>  		break;
> -- 
> 2.25.1
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795