[Intel-gfx] [PATCH] drm/i915/dp: Add current maximum eDP link rate to sink_rate array.

[Ville Syrjälä]

On Thu, Jan 09, 2020 at 05:38:15PM +0200, Ville Syrjälä wrote:
> On Thu, Jan 09, 2020 at 05:26:57PM +0200, Ville Syrjälä wrote:
> > On Thu, Jan 09, 2020 at 04:07:52PM +0100, Mario Kleiner wrote:
> > > If the current eDP link rate, as read from hw, provides a
> > > higher bandwidth than the standard link rates, then add the
> > > current link rate to the link_rates array for consideration
> > > in future mode-sets.
> > > 
> > > These initial current eDP link settings have been set up by
> > > firmware during boot, so they should work on the eDP panel.
> > > Therefore use them if the firmware thinks they are good and
> > > they provide higher link bandwidth, e.g., to enable higher
> > > resolutions / color depths.
> > > 
> > > This fixes a problem found on the MacBookPro 2017 Retina panel:
> > > 
> > > The panel reports 10 bpc color depth in its EDID, and the UEFI
> > > firmware chooses link settings at boot which support enough
> > > bandwidth for 10 bpc (324000 kbit/sec to be precise), but the
> > > DP_MAX_LINK_RATE dpcd register only reports 2.7 Gbps as possible,
> 
> Does it actually or do we just ignore the fact that it reports 3.24Gbps?
> 
> If it really reports 3.24 then we should be able to just add that to
> dp_rates[] in intel_dp_set_sink_rates() and be done with it.
> 
> Although we'd likely want to skip 3.24 unless it really is reported
> as the max so as to not use that non-standard rate on other displays.
> So would require a bit fancier logic for that.

Maybe just something like this?

--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -177,6 +177,12 @@ static void intel_dp_set_sink_rates(struct intel_dp *intel_dp)
                intel_dp->sink_rates[i] = dp_rates[i];
        }
 
+       /* blah */
+       if (max_rate > intel_dp->sink_rates[i - 1]) {
+               DRM_DEBUG_KMS(...);
+               intel_dp->sink_rates[i++] = max_rate;
+       }
+
        intel_dp->num_sink_rates = i;

> 
> > > so intel_dp_set_sink_rates() would cap at that. This restricts
> > > achievable color depth to 8 bpc, not providing the full color
> > > depth of the panel. With this commit, we can use firmware setting
> > > and get the full 10 bpc advertised by the Retina panel.
> > > 
> > > Signed-off-by: Mario Kleiner <mario.kleiner.de at gmail.com>
> > > Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_dp.c | 23 +++++++++++++++++++++++
> > >  1 file changed, 23 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > > index 2f31d226c6eb..aa3e0b5108c6 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > @@ -4368,6 +4368,8 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
> > >  {
> > >  	struct drm_i915_private *dev_priv =
> > >  		to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
> > > +	int max_rate;
> > > +	u8 link_bw;
> > >  
> > >  	/* this function is meant to be called only once */
> > >  	WARN_ON(intel_dp->dpcd[DP_DPCD_REV] != 0);
> > > @@ -4433,6 +4435,27 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
> > >  	else
> > >  		intel_dp_set_sink_rates(intel_dp);
> > >  
> > > +	/*
> > > +	 * If the firmware programmed a rate higher than the standard sink rates
> > > +	 * during boot, then add that rate as a valid sink rate, as fw knows
> > > +	 * this is a good rate and we get extra bandwidth.
> > > +	 *
> > > +	 * Helps, e.g., on the Apple MacBookPro 2017 Retina panel, which is only
> > > +	 * eDP 1.1, but supports the unusual rate of 324000 kHz at bootup, for
> > > +	 * 10 bpc / 30 bit color depth.
> > > +	 */
> > > +	if (!intel_dp->use_rate_select &&
> > > +	    (drm_dp_dpcd_read(&intel_dp->aux, DP_LINK_BW_SET, &link_bw, 1) == 1) &&
> > > +	    (link_bw > 0) && (intel_dp->num_sink_rates < DP_MAX_SUPPORTED_RATES)) {
> > > +		max_rate = drm_dp_bw_code_to_link_rate(link_bw);
> > > +		if (max_rate > intel_dp->sink_rates[intel_dp->num_sink_rates - 1]) {
> > > +			intel_dp->sink_rates[intel_dp->num_sink_rates] = max_rate;
> > > +			intel_dp->num_sink_rates++;
> > > +			DRM_DEBUG_KMS("Adding max bandwidth eDP rate %d kHz.\n",
> > > +				      max_rate);
> > > +		}
> > 
> > Hmm. I guess we could do this. But plese put it into a separate
> > function so we don't end up with that super ugly if condition.
> > 
> > The debug message should probably be a bit more explicit. Eg. 
> > something like: 
> > "Firmware using non-standard link rate %d kHz. Including it in sink rates.\n"
> > 
> > I'm also wondering if we shouldn't just add the link rate to the sink
> > rates regradless of whether it's the highest rate or not...
> > 
> > > +	}
> > > +
> > >  	intel_dp_set_common_rates(intel_dp);
> > >  
> > >  	/* Read the eDP DSC DPCD registers */
> > > -- 
> > > 2.24.0
> > > 
> > > _______________________________________________
> > > dri-devel mailing list
> > > dri-devel at lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/dri-devel
> > 
> > -- 
> > Ville Syrjälä
> > Intel
> 
> -- 
> Ville Syrjälä
> Intel
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-- 
Ville Syrjälä
Intel