[Intel-gfx] [PATCH] drm/i915/tgl: Add Wa_1409825376 to tgl

Matt Roper matthew.d.roper at intel.com
Thu Jan 9 22:11:49 UTC 2020


On Thu, Jan 09, 2020 at 02:02:26PM -0800, Radhakrishna Sripada wrote:
> Workaround database indicates we should disable VRH clockgating
> in pre-production hardware.

Maybe also add a

    Bspec: 52890
    Bspec: 49424

for reference?

> 
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 3 +++
>  drivers/gpu/drm/i915/intel_pm.c | 5 +++++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 6cc55c103f67..5215df17e7bd 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4124,6 +4124,9 @@ enum {
>  #define   PWM2_GATING_DIS		(1 << 14)
>  #define   PWM1_GATING_DIS		(1 << 13)
>  
> +#define GEN9_CLKGATE_DIS_3		_MMIO(0x46538)
> +#define   TGL_VRH_GATING_DIS		(1 << 31)

For new registers (or registers which are receiving noticeable updates),
I think we're trying to slowly transition over to REG_BIT(31) notation.

Aside from that,

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> +
>  #define GEN9_CLKGATE_DIS_4		_MMIO(0x4653C)
>  #define   BXT_GMBUS_GATING_DIS		(1 << 14)
>  
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 148ac455dfa7..0d71fc19d0ee 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6630,6 +6630,11 @@ static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
>  
>  	I915_WRITE(POWERGATE_ENABLE,
>  		   I915_READ(POWERGATE_ENABLE) | vd_pg_enable);
> +
> +	/* Wa_1409825376:tgl (pre-prod)*/
> +	if (IS_TGL_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_A0))
> +		I915_WRITE(GEN9_CLKGATE_DIS_3, I915_READ(GEN9_CLKGATE_DIS_3) |
> +			   TGL_VRH_GATING_DIS);
>  }
>  
>  static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
> -- 
> 2.20.1
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795


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