[Intel-gfx] [PATCH v12 0/5] Enable second DBuf slice for ICL and TGL

[Matt Roper]

On Wed, Jan 15, 2020 at 11:45:51PM +0200, Stanislav Lisovskiy wrote:
> Those patch series, do some initial preparation DBuf manipulating code
> cleanups, i.e remove redundant structures/code, switch to mask
> based DBuf manupulation, get into use DBuf assignment according to
> BSpec rules.

I just noticed that bspec page 49213 indicates we should also be writing
a value of '8' to bits 23:19 on gen12.  We don't seem to handling that
yet.  We may need to add that change as an additional patch.


Matt

> 
> Stanislav Lisovskiy (5):
>   drm/i915: Remove skl_ddl_allocation struct
>   drm/i915: Move dbuf slice update to proper place
>   drm/i915: Manipulate DBuf slices properly
>   drm/i915: Introduce parameterized DBUF_CTL
>   drm/i915: Correctly map DBUF slices to pipes
> 
>  drivers/gpu/drm/i915/display/intel_display.c  |  52 +-
>  .../drm/i915/display/intel_display_power.c    |  88 ++--
>  .../drm/i915/display/intel_display_power.h    |   6 +
>  .../drm/i915/display/intel_display_types.h    |   3 +
>  drivers/gpu/drm/i915/i915_drv.h               |   7 +-
>  drivers/gpu/drm/i915/i915_pci.c               |   5 +-
>  drivers/gpu/drm/i915/i915_reg.h               |  12 +-
>  drivers/gpu/drm/i915/intel_device_info.h      |   1 +
>  drivers/gpu/drm/i915/intel_pm.c               | 457 +++++++++++++++---
>  drivers/gpu/drm/i915/intel_pm.h               |   7 +-
>  10 files changed, 496 insertions(+), 142 deletions(-)
> 
> -- 
> 2.24.1.485.gad05a3d8e5
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795