[Intel-gfx] [RFC 6/6] drm/i915: Enable 3 display pipes support

Ville Syrjälä ville.syrjala at linux.intel.com
Thu Jan 23 13:53:27 UTC 2020


On Thu, Jan 23, 2020 at 06:56:59PM +0530, Anshuman Gupta wrote:
> Allow 3-display pipes SKU system with any combination
> in INTEL_INFO pipe mask.
> B.Spec:50075
> 
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_device_info.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index fcdacd6d4aa5..459047c98e82 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -997,10 +997,11 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
>  
>  		/*
>  		 * At least one pipe should be enabled and if there are
> -		 * disabled pipes, they should be the last ones, with no holes
> -		 * in the mask.
> +		 * disabled pipes, up to Display Gen<=12, they should be the
> +		 * last ones, with no holses in the mask.
>  		 */
> -		if (enabled_mask == 0 || !is_power_of_2(enabled_mask + 1))
> +		if (enabled_mask == 0 || (!is_power_of_2(enabled_mask + 1) &&
> +		    (INTEL_GEN(dev_priv) <= 11 || IS_TIGERLAKE(dev_priv))))

intel_pipe_mask_is_valid() or something to avoid this horror show
in the if condition.

>  			drm_err(&dev_priv->drm,
>  				"invalid pipe fuse configuration: enabled_mask=0x%x\n",
>  				enabled_mask);
> -- 
> 2.24.0

-- 
Ville Syrjälä
Intel


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