[Intel-gfx] [PATCH v16 0/7] Enable second DBuf slice for ICL and TGL

Stanislav Lisovskiy stanislav.lisovskiy at intel.com
Fri Jan 24 08:44:49 UTC 2020


Those patch series, do some initial preparation DBuf manipulating code
cleanups, i.e remove redundant structures/code, switch to mask
based DBuf manupulation, get into use DBuf assignment according to
BSpec rules.

Stanislav Lisovskiy (7):
  drm/i915: Remove skl_ddl_allocation struct
  drm/i915: Move dbuf slice update to proper place
  drm/i915: Introduce parameterized DBUF_CTL
  drm/i915: Manipulate DBuf slices properly
  drm/i915: Correctly map DBUF slices to pipes
  drm/i915: Protect intel_dbuf_slices_update with mutex
  drm/i915: Update dbuf slices only with full modeset

 drivers/gpu/drm/i915/display/intel_display.c  |  54 ++-
 .../drm/i915/display/intel_display_power.c    |  95 ++--
 .../drm/i915/display/intel_display_power.h    |   5 +
 .../drm/i915/display/intel_display_types.h    |   3 +
 drivers/gpu/drm/i915/i915_drv.h               |   7 +-
 drivers/gpu/drm/i915/i915_pci.c               |   5 +-
 drivers/gpu/drm/i915/i915_reg.h               |   7 +-
 drivers/gpu/drm/i915/intel_device_info.h      |   1 +
 drivers/gpu/drm/i915/intel_pm.c               | 449 +++++++++++++++---
 drivers/gpu/drm/i915/intel_pm.h               |   5 +-
 10 files changed, 480 insertions(+), 151 deletions(-)

-- 
2.24.1.485.gad05a3d8e5



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