[Intel-gfx] [PATCH] drm/i915/perf: Use GTT when saving/restoring engine GPR

Lionel Landwerlin lionel.g.landwerlin at intel.com
Thu Jul 9 20:40:50 UTC 2020


On 09/07/2020 22:58, Umesh Nerlige Ramappa wrote:
> MI_STORE_REGISTER_MEM and MI_LOAD_REGISTER_MEM need to know which
> translation to use when saving restoring the engine general purpose
> registers to and from the GT scratch. Since GT scratch is mapped to
> ggtt, we need to set an additional bit in the command to use GTT.
>
> Fixes: daed3e44396d17 ("drm/i915/perf: implement active wait for noa configurations")
> Suggested-by: Prathap Kumar Valsan <prathap.kumar.valsan at intel.com>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>


Thanks a lot!

> ---
>   drivers/gpu/drm/i915/i915_perf.c | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index de69d430b1ed..c6f6370283cf 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -1592,6 +1592,7 @@ static u32 *save_restore_register(struct i915_perf_stream *stream, u32 *cs,
>   	u32 d;
>   
>   	cmd = save ? MI_STORE_REGISTER_MEM : MI_LOAD_REGISTER_MEM;
> +	cmd |= MI_SRM_LRM_GLOBAL_GTT;
>   	if (INTEL_GEN(stream->perf->i915) >= 8)
>   		cmd++;
>   




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