[Intel-gfx] [PATCH v2] drm/i915/fbc: Limit cfb to the first 256MiB of stolen on g4x+

Chris Wilson chris at chris-wilson.co.uk
Tue Jul 14 20:32:54 UTC 2020


Quoting Ville Syrjala (2020-07-14 21:19:45)
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Since g4x the CFB base only takes a 28bit offset into stolen.
> Not sure if the CFB is allowed to start below that limit but
> then extend beyond it. Let's assume not and just restrict the
> allocation to the first 256MiB (in the unlikely case
> we have more stolen than that).
> 
> v2: s/BIT/BIT_ULL/ (Chris)
> 
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 85723fba6002..3a4f980788a6 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -424,6 +424,14 @@ static void intel_fbc_deactivate(struct drm_i915_private *dev_priv,
>         fbc->no_fbc_reason = reason;
>  }
>  
> +static u64 intel_fbc_cfb_base_max(struct drm_i915_private *i915)
> +{
> +       if (INTEL_GEN(i915) >= 5 || IS_G4X(i915))
> +               return BIT_ULL(28);
> +       else
> +               return BIT_ULL(32);
> +}

Confirmed that ilk uses 23:12. I trust g4x is the same.
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>

I didn't find the others quickly, but it's not going to harm.
-Chris


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