[Intel-gfx] [PATCH v8 0/5] Remaining RKL patches

[Matt Roper]

The first couple patches here already have r-b's from Jose, but since
it's been a while since they were last sent to the list we should get
another CI pass before merging them.

Changes since v7:
 - Undo the renumbering of PLL IDs in the DPLL4 patch; the shared DPLL
   code has deep-rooted assumptions that the PLL table has no holes and
   that id==idx; renumbering works fine for RKL, but breaks one of those
   assumptions for TGL.  Instead introduce RKL-specific RKL_DPLL_CFGCR
   macros to look up the proper register with the existing PLL IDs.
 - Incorporate Jose's review feedback on the HTI patch and combo PHY WA
   patch.

Cc: José Roberto de Souza <jose.souza at intel.com>

Matt Roper (5):
  drm/i915/rkl: Handle new DPCLKA_CFGCR0 layout
  drm/i915/rkl: Add initial workarounds
  drm/i915/rkl: Add DPLL4 support
  drm/i915/rkl: Handle HTI
  drm/i915/rkl: Add Wa_14011224835 for PHY B initialization

 .../gpu/drm/i915/display/intel_combo_phy.c    | 50 +++++++++++
 drivers/gpu/drm/i915/display/intel_ddi.c      | 37 +++++++-
 drivers/gpu/drm/i915/display/intel_display.c  | 23 ++++-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 52 +++++++++--
 drivers/gpu/drm/i915/display/intel_sprite.c   |  5 +-
 drivers/gpu/drm/i915/gt/intel_workarounds.c   | 89 ++++++++++++-------
 drivers/gpu/drm/i915/i915_drv.h               |  8 ++
 drivers/gpu/drm/i915/i915_pci.c               |  1 +
 drivers/gpu/drm/i915/i915_reg.h               | 31 ++++++-
 drivers/gpu/drm/i915/intel_device_info.h      |  1 +
 10 files changed, 249 insertions(+), 48 deletions(-)

-- 
2.24.1