[Intel-gfx] [PATCH 1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating()

Souza, Jose jose.souza at intel.com
Thu Jul 16 23:50:28 UTC 2020


On Thu, 2020-07-16 at 22:04 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> It's silly to have if(SKL) checks in gen9_init_clock_gating() when
> we can just move those bits into skl_init_clock_gating().
> 
> I'm not entirely convinced we even need this w/a, or if we do
> then maybe we want it for kbl/cfl as well. IIRC it was only
> listed in the wadb, but that is now dead so can't double check
> anymore. Bspec doesn't seem to have any purely skl specific
> DOP clock gating workarounds listed.

Reviewed-by: José Roberto de Souza <jose.souza at intel.com>

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
> Probably should move this to the gt w/a code actually. But 
> there's a lot more gt related stuff still in .init_clock_gating()
> so should grab a bigger shovel to move it all in one go.
> 
>  drivers/gpu/drm/i915/intel_pm.c | 10 ++++------
>  1 file changed, 4 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index cfabbe0481ab..0a1a95060f38 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -100,12 +100,6 @@ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
>  	 */
>  	I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
>  		   DISP_FBC_MEMORY_WAKE);
> -
> -	if (IS_SKYLAKE(dev_priv)) {
> -		/* WaDisableDopClockGating */
> -		I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL)
> -			   & ~GEN7_DOP_CLOCK_GATE_ENABLE);
> -	}
>  }
>  
>  static void bxt_init_clock_gating(struct drm_i915_private *dev_priv)
> @@ -7251,6 +7245,10 @@ static void skl_init_clock_gating(struct drm_i915_private *dev_priv)
>  {
>  	gen9_init_clock_gating(dev_priv);
>  
> +	/* WaDisableDopClockGating:skl */
> +	I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL) &
> +		   ~GEN7_DOP_CLOCK_GATE_ENABLE);
> +
>  	/* WAC6entrylatency:skl */
>  	I915_WRITE(FBC_LLC_READ_CTRL, I915_READ(FBC_LLC_READ_CTRL) |
>  		   FBC_LLC_FULLY_OPEN);


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