[Intel-gfx] [PATCH v5 11/16] pwm: crc: Implement apply() method to support the new atomic PWM API

Andy Shevchenko andriy.shevchenko at linux.intel.com
Wed Jul 29 10:51:29 UTC 2020


On Fri, Jul 17, 2020 at 03:37:48PM +0200, Hans de Goede wrote:
> Replace the enable, disable and config pwm_ops with an apply op,
> to support the new atomic PWM API.

I didn't notice any visible issue, so
Reviewed-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com>

Perhaps you may consider reusing existing _enable() / _disable(), but I don't
see if there will be nice improvement (maybe if in on of the previous patches
you also add an error handling to them first).

> Signed-off-by: Hans de Goede <hdegoede at redhat.com>
> ---
> Changes in v3:
> - Keep crc_pwm_calc_clk_div() helper to avoid needless churn
> ---
>  drivers/pwm/pwm-crc.c | 89 ++++++++++++++++++++++++++-----------------
>  1 file changed, 53 insertions(+), 36 deletions(-)
> 
> diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
> index b72008c9b072..8a7f4707279c 100644
> --- a/drivers/pwm/pwm-crc.c
> +++ b/drivers/pwm/pwm-crc.c
> @@ -51,59 +51,76 @@ static int crc_pwm_calc_clk_div(int period_ns)
>  	return clk_div;
>  }
>  
> -static int crc_pwm_enable(struct pwm_chip *c, struct pwm_device *pwm)
> +static int crc_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
> +			 const struct pwm_state *state)
>  {
> -	struct crystalcove_pwm *crc_pwm = to_crc_pwm(c);
> -	int div = crc_pwm_calc_clk_div(pwm_get_period(pwm));
> -
> -	regmap_write(crc_pwm->regmap, PWM0_CLK_DIV, div | PWM_OUTPUT_ENABLE);
> -	regmap_write(crc_pwm->regmap, BACKLIGHT_EN, 1);
> -
> -	return 0;
> -}
> -
> -static void crc_pwm_disable(struct pwm_chip *c, struct pwm_device *pwm)
> -{
> -	struct crystalcove_pwm *crc_pwm = to_crc_pwm(c);
> -	int div = crc_pwm_calc_clk_div(pwm_get_period(pwm));
> -
> -	regmap_write(crc_pwm->regmap, BACKLIGHT_EN, 0);
> -	regmap_write(crc_pwm->regmap, PWM0_CLK_DIV, div);
> -}
> -
> -static int crc_pwm_config(struct pwm_chip *c, struct pwm_device *pwm,
> -			  int duty_ns, int period_ns)
> -{
> -	struct crystalcove_pwm *crc_pwm = to_crc_pwm(c);
> +	struct crystalcove_pwm *crc_pwm = to_crc_pwm(chip);
>  	struct device *dev = crc_pwm->chip.dev;
> -	int level;
> +	int err;
>  
> -	if (period_ns > PWM_MAX_PERIOD_NS) {
> +	if (state->period > PWM_MAX_PERIOD_NS) {
>  		dev_err(dev, "un-supported period_ns\n");
>  		return -EINVAL;
>  	}
>  
> -	if (pwm_get_period(pwm) != period_ns) {
> -		int clk_div = crc_pwm_calc_clk_div(period_ns);
> +	if (state->polarity != PWM_POLARITY_NORMAL)
> +		return -EOPNOTSUPP;
> +
> +	if (pwm_is_enabled(pwm) && !state->enabled) {
> +		err = regmap_write(crc_pwm->regmap, BACKLIGHT_EN, 0);
> +		if (err) {
> +			dev_err(dev, "Error writing BACKLIGHT_EN %d\n", err);
> +			return err;
> +		}
> +	}
> +
> +	if (pwm_get_duty_cycle(pwm) != state->duty_cycle ||
> +	    pwm_get_period(pwm) != state->period) {
> +		int level = state->duty_cycle * PWM_MAX_LEVEL / state->period;
>  
> +		err = regmap_write(crc_pwm->regmap, PWM0_DUTY_CYCLE, level);
> +		if (err) {
> +			dev_err(dev, "Error writing PWM0_DUTY_CYCLE %d\n", err);
> +			return err;
> +		}
> +	}
> +
> +	if (pwm_is_enabled(pwm) && state->enabled &&
> +	    pwm_get_period(pwm) != state->period) {
>  		/* changing the clk divisor, clear PWM_OUTPUT_ENABLE first */
> -		regmap_write(crc_pwm->regmap, PWM0_CLK_DIV, 0);
> +		err = regmap_write(crc_pwm->regmap, PWM0_CLK_DIV, 0);
> +		if (err) {
> +			dev_err(dev, "Error writing PWM0_CLK_DIV %d\n", err);
> +			return err;
> +		}
> +	}
>  
> -		regmap_write(crc_pwm->regmap, PWM0_CLK_DIV,
> -					clk_div | PWM_OUTPUT_ENABLE);
> +	if (pwm_get_period(pwm) != state->period ||
> +	    pwm_is_enabled(pwm) != state->enabled) {
> +		int clk_div = crc_pwm_calc_clk_div(state->period);
> +		int pwm_output_enable = state->enabled ? PWM_OUTPUT_ENABLE : 0;
> +
> +		err = regmap_write(crc_pwm->regmap, PWM0_CLK_DIV,
> +				   clk_div | pwm_output_enable);
> +		if (err) {
> +			dev_err(dev, "Error writing PWM0_CLK_DIV %d\n", err);
> +			return err;
> +		}
>  	}
>  
> -	/* change the pwm duty cycle */
> -	level = duty_ns * PWM_MAX_LEVEL / period_ns;
> -	regmap_write(crc_pwm->regmap, PWM0_DUTY_CYCLE, level);
> +	if (!pwm_is_enabled(pwm) && state->enabled) {
> +		err = regmap_write(crc_pwm->regmap, BACKLIGHT_EN, 1);
> +		if (err) {
> +			dev_err(dev, "Error writing BACKLIGHT_EN %d\n", err);
> +			return err;
> +		}
> +	}
>  
>  	return 0;
>  }
>  
>  static const struct pwm_ops crc_pwm_ops = {
> -	.config = crc_pwm_config,
> -	.enable = crc_pwm_enable,
> -	.disable = crc_pwm_disable,
> +	.apply = crc_pwm_apply,
>  };
>  
>  static int crystalcove_pwm_probe(struct platform_device *pdev)
> -- 
> 2.26.2
> 

-- 
With Best Regards,
Andy Shevchenko




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