[Intel-gfx] [PATCH 11/66] drm/i915: Preallocate stashes for vma page-directories

Thomas Hellström (Intel) thomas_os at shipmail.org
Thu Jul 30 12:28:19 UTC 2020


On 7/28/20 4:50 PM, Chris Wilson wrote:
>
> It's in the user critical path (the shortest path to perform their
> sequence of operations), but it's before the dma-fence itself. I say
> that's a particularly nasty false claim that it is not on the critical
> path, but being where it is circumvents the whole argument.
>   

Couldn't the following situation happen?

1. CS spawns userptr pinning work.
2. CS creates and publishes a DMA-fence that depends on that pinning work.
3. Another driver CS creates and publishes a second DMA-fence that 
depends on that first DMA-fence.
4. userptr pinning starts pinning pages, triggers a shrinker on the 
other driver
5. Other driver shrinker blocks on the second DMA-fence,
6. Deadlock.

Or do I misread the i915 userptr code?

/Thomas




More information about the Intel-gfx mailing list