[Intel-gfx] [PATCH] drm/i915/gt: Support multiple pinned timelines

Matthew Auld matthew.william.auld at gmail.com
Thu Jul 30 18:17:05 UTC 2020


On Thu, 30 Jul 2020 at 17:52, Chris Wilson <chris at chris-wilson.co.uk> wrote:
>
> We may need to allocate more than one pinned context/timeline for each
> engine which can utilise the per-engine HWSP, so we need to give each
> a different offset within it.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld at intel.com>


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