[Intel-gfx] [igt-dev] [PATCH i-g-t] i915/gem_exec_balancer: Disable pre-parser for rewritten batches

[Chris Wilson]

Quoting Mika Kuoppala (2020-06-01 15:56:55)
> Chris Wilson <chris at chris-wilson.co.uk> writes:
> 
> > As we rewrite the batches on the fly to implement the non-preemptible
> > lock, we need to tell Tigerlake to read the batch afresh each time.
> > Amusingly, the disable is a part of an arb-check, so we have to be
> > careful not to include the arbitration point inside our unpreemptible
> > loop.
> >
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > ---
> >  tests/i915/gem_exec_balancer.c | 13 +++++++++----
> >  1 file changed, 9 insertions(+), 4 deletions(-)
> >
> > diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
> > index 026f8347e..0e3b52900 100644
> > --- a/tests/i915/gem_exec_balancer.c
> > +++ b/tests/i915/gem_exec_balancer.c
> > @@ -1350,6 +1350,11 @@ static void __bonded_dual(int i915,
> >       *out = cycles;
> >  }
> >  
> > +static uint32_t preparser_disable(void)
> > +{
> > +     return 0x5 << 23 | 1 << 8 | 1; /* preparser masked disable */
> 
> there is MI_ARB_CHECK
> 
> > +}
> > +
> >  static uint32_t sync_from(int i915, uint32_t addr, uint32_t target)
> >  {
> >       uint32_t handle = gem_create(i915, 4096);
> > @@ -1363,14 +1368,14 @@ static uint32_t sync_from(int i915, uint32_t addr, uint32_t target)
> >       *cs++ = 0;
> >       *cs++ = 0;
> >  
> > -     *cs++ = MI_NOOP;
> > +     *cs++ = preparser_disable();
> >       *cs++ = MI_NOOP;
> >       *cs++ = MI_NOOP;
> >       *cs++ = MI_NOOP;
> >  
> >       /* wait for them to cancel us */
> >       *cs++ = MI_BATCH_BUFFER_START | 1 << 8 | 1;
> > -     *cs++ = addr + 16;
> > +     *cs++ = addr + 24;
> 
> I must be totally confused about the layout as I can't get
> the +8. You take one nop out and put one arb check in
> and everything moves with 8?

It's just skipping over the MI_ARB_CHECK, +4, aligned to the next qword
because some old habits die hard.
-Chris